The detailed description of the implementation is based on the MAX II devices. This application can also be implemented in MAX V and MAX 10 devices.

The “MUX” in Figure 1 represents a unidirectional multiplexer that is implemented using a MAX II device. The select line for the multiplexer is controlled through an I²C interface, which is also implemented in the same device. The multiplexer is thus an I²C slave, and the clock line from the host controller is either connected to the SD Device A or the SD Device B, depending on the I²C data received.

The I²C interface implementation in the MAX II device (I²C slave) has a 7-bit address and follows the general I²C protocol. The start signal is sent by the master, followed by the 7-bit address and an R/W bit. When the address broadcast on the I²C bus matches with the slave device’s address, an ACK (acknowledge) signal is sent by the device. This is followed by a DATA byte, as per the select line selection that is required by the master. This is then followed by another ACK signal by the slave. The end of a session of data transaction is when the Stop (P) signal is sent by the master.

This design example can be implemented with the EPM240G or EPM240 device or any other MAX II device. It is demonstrated in an I²C bus environment. Implementation involves using this design example source code and allocating I²C bus lines, the SD host controller clock line, the eject line, and the clock lines for the SD Device A and SD Device B. An LED indicator that is used to indicate the current selection is connected to an output port assigned to display the select line status. This SD multiplexer is demonstrated on the MDN-B2 demo board and with the help of an I²C simulator. The simulator is created using a PC parallel port and interfacing hardware to create an I²C-compliant two-wire bus. The MDN-B2 features two SD sockets to accommodate two SD devices (to be multiplexed) and an SD card-shaped PCB adapter that fits into a standard SD socket of an SD host.

The utility program, which uses the parallel port, and its hardware interface with the MAX II-based multiplexer and provide the SDA and SCL connections as required on an I²C two-wire system. When implemented, this design allows the I²C master (or the control panel of the Maxim utility) to control the select line of the MAX II-based multiplexer on the MDN-B2. The following table lists the EPM240G pin assignments for this design example.