The following design examples show the capability of the supported Altera device in a self-power-down system. MAX II and MAX V devices are different from MAX 10 devices due to different flash memory usage modes. The registers’ data is retained to ensure that the system’s operation is not affected by the power-down. The example system consists of the design implemented in a MAX II, MAX V, or MAX 10 device as well as some external hardware circuitry. The hardware circuitry and the design in the device work together to ensure the success of the self-power-down system.

In the example applications, a 4-bit binary up-counter is the user application module in which the counter’s data must be retained when the supported Altera device is powered down after a predefined period of inactivity. Upon power-up, the data is reloaded into the counter’s registers, so the count operation resumes from the previous value.

Supplying a trigger signal to the counter with a pushbutton (active low signal) increases the count value by one. If the counter does not receive a trigger signal after a fixed duration, the design automatically stores the count value into the UFM before triggering the external circuitry to power down the supported Altera device.

For MAX II and MAX V devices, when the next trigger signal is received to increase the count, the device automatically powers up. The design then reads back the data from the correct location in the UFM and reloads the counter’s registers. The count value is incremented by one from the read-back data. For MAX 10 devices, pressing the trigger signal powers up the design and fetches the last value stored and puts the value out on the LED display, but doesn't increment the value.

You can also reset the counter by pressing the reset button that clears the count value.