Intel Acceleration Stack Quick Start Guide for Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

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ID 683633
Date 12/04/2020
Public
Document Table of Contents
Document Table of Contents x
1. About This Document 2. Introduction 3. Getting Started 4. Installing the OPAE Software Package 5. Identifying the Flash Image and BMC Firmware 6. Running FPGA Diagnostics 7. Running the OPAE in a Non-Virtualized Environment 8. Running the OPAE in a Virtualized Environment 9. Intel® Acceleration Stack Quick Start Guide for Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA Archives 10. Document Revision History for Intel® Acceleration Stack Quick Start Guide for Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA A. Updating the FIM and BMC Firmware B. Handling Graceful Thermal Shutdown C. FPGA Device Access Permission D. Memlock Limit E. Hugepage Settings F. Troubleshooting Frequently Asked Questions (FAQ) G. Documentation Available for the Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs 1.2.1 Release
1. About This Document x
1.1. Intended Audience 1.2. Acronym List 1.3. Acceleration Glossary
3. Getting Started x
3.1. Intel Acceleration Stack Hardware Features 3.2. System Requirements 3.3. Installing the Intel® PAC with Intel® Arria® 10 GX FPGA Card In the Host Machine 3.4. Installing the Intel Acceleration Stack
3.4. Installing the Intel Acceleration Stack x
3.4.1. Installing the Intel Acceleration Stack Runtime Package on the Host Machine 3.4.2. Installing the Intel Acceleration Stack Development Package on the Host Machine 3.4.3. Understanding the Extracted Intel® PAC with Intel® Arria® 10 GX FPGA Release Package
4. Installing the OPAE Software Package x
4.1. RHEL 7.6: Installing the OPAE Framework from Prebuilt Binaries (RPM) 4.2. Ubuntu: Installing the OPAE Framework from Prebuilt Binaries (deb) 4.3. (Optional) Building and Installing the OPAE Software from Source Code 4.4. Installing the OPAE PACSign
7. Running the OPAE in a Non-Virtualized Environment x
7.1. Loading an AFU Image into the FPGA 7.2. OPAE Sample Application Programs
7.2. OPAE Sample Application Programs x
7.2.1. Running the Hello FPGA Example
8. Running the OPAE in a Virtualized Environment x
8.1. Updating Settings Required for VFs 8.2. Configuring the VF Port on the Host 8.3. Running the Hello FPGA Example on Virtual Machine
8.3. Running the Hello FPGA Example on Virtual Machine x
8.3.1. Disconnecting the VF from the VM and Reconnecting to the PF
A. Updating the FIM and BMC Firmware x
A.1. Selecting the Correct Update Method
A.1. Selecting the Correct Update Method x
A.1.1. Updating FPGA Flash and BMC Firmware
F. Troubleshooting Frequently Asked Questions (FAQ) x
F.1. Why do I see a 'No Suitable slots found' message when running fpgaconf on my AFU image? F.2. How do I flash the FIM or program the AFU in a multicard system? F.3. Which environment variables are required? F.4. What actions do I take if I see the error message 'Error enumerating resources: no driver available'? F.5. Troubleshooting OPAE Installation on RHEL
1. About This Document
2. Introduction
3. Getting Started
4. Installing the OPAE Software Package
5. Identifying the Flash Image and BMC Firmware
6. Running FPGA Diagnostics
7. Running the OPAE in a Non-Virtualized Environment
8. Running the OPAE in a Virtualized Environment
9. Intel® Acceleration Stack Quick Start Guide for Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA Archives
10. Document Revision History for Intel® Acceleration Stack Quick Start Guide for Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA
A. Updating the FIM and BMC Firmware
B. Handling Graceful Thermal Shutdown
C. FPGA Device Access Permission
D. Memlock Limit
E. Hugepage Settings
F. Troubleshooting Frequently Asked Questions (FAQ)
G. Documentation Available for the Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs 1.2.1 Release

A.1.1. Updating FPGA Flash and BMC Firmware

Before you begin:

  • The FIM must be at version 1.2 and the BMC version must be 26889.
  • OPAE Software package (Version 1.1.2-2) must be installed. This can be checked by running:
    rpm -qa | grep opae
  • Do not interrupt the commands.
  • These commands must be run on a Host Machine and not on a Virtual Machine.
  • Stop any service or daemon accessing the FPGA before updating the FPGA flash. For example, stop the pacd service by using command:
    systemctl stop pacd.service
  • All files required for the FIM and BMC update are located at /usr/share/opae/a10-gx-pac/*.
Important: You must not downgrade your BMC firmware after upgrading to version 26895. BMC version 26895 only supports the Acceleration Stack 1.2.1 FIM (38d782e3-b612-5343-b934-2433e348ac4c) and no prior Acceleration Stack release is supported. Please check compatibility of intended AFU workloads with Acceleration Stack 1.2.1 before upgrading the board. For questions, please contact your Intel® sales representative or workload solutions partner.

The following steps update the Intel® PAC with Intel® Arria® 10 GX FPGA card:

  1. Run the one-time secure update command to update the FPGA flash:
    [RHEL]: 
    sudo fpgaotsu /usr/share/opae/a10*/one*/otsu-09C4.json
    [Ubuntu]: 
    sudo fpgaotsu /usr/share/opae/a10*/fpgaotsu/base/otsu-09C4.json
    Note: This command can take up to 40 minutes to complete. Stop any service accessing the FPGA such as pacd before performing the update.
    Figure 6. Sample Output:
  2. Power cycle the server.
  3. Run the super-rsu command to update the BMC bootloader and firmware.
    [RHEL]: 
    sudo super-rsu /usr/share/opae/a10*/super*/*.json
    [Ubuntu]: 
    sudo super-rsu /usr/share/opae/a10-gx-pac/super-rsu/base/rsu-09c4.json
    Figure 7. Sample Output:
  4. Power cycle the server.
  5. Ensure BMC version (26895) and PR Interface ID or FIM version (38d782e3-b612-5343-b934-2433e348ac4c) is displayed while running: 
    sudo fpgainfo fme

    For more information about the fpgasupdate tool, refer to the Open Programmable Acceleration Engine - Documentation web page on GIT and the Security User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA (available at a later date).

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