Intel Acceleration Stack Quick Start Guide for Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

ID 683633
Date 12/04/2020
Public
Document Table of Contents

7.1. Loading an AFU Image into the FPGA

You can utilize the fpgasupdate utility to load an AFU image. In Acceleration Stack 1.2.1 and later versions, the Intel® FPGA PAC must be programmed with AFU images that have been prepended with mandatory headers. These headers are applied by the PACSign tool. For more information on the PACSign tool, please refer to the Security User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA .

The samples included with Acceleration Stack have been processed by PACSign and the AFU binary files are located at:
$OPAE_PLATFORM_ROOT/hw/samples/<AFU Name>/bin/*_unsigned.gbs

If the Intel® FPGA PAC is programmed with a root entry hash following the steps in the Security User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA , then the provided AFU bitstreams (for example: hello_afu_unsigned.gbs) must be signed using PACSign with the appropriate root and code signing keys before you can successfully program the signed AFU bitstream.

sudo fpgasupdate <AFU image>
The fpgasupdate tool can program a signed AFU bitstream provided that there is a root entry hash programmed into the flash.
Note: Programming the signed AFU bitstream can take up to 2 minutes; and programming the unsigned AFU bitstream takes seconds.

The fpgasupdate tool also accepts PCIe* Bus:Device:Function (BDF) as an additional optional argument if multiple cards are connected to the server. Use the help text (-h) to see how additional arguments must be passed. For example: sudo fpgasupdate -h.

To identify the BDF run the following command:

 lspci | grep 09c4

Sample output:

37:00.0 Processing accelerators: Intel Corporation Device 09c4

In the Sample Output, the PCIe Bus is 0x37, the Device is 0x00, and the Function is 0x0.