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Visible to Intel only — GUID: pbp1734315260803
Ixiasoft
Visible to Intel only — GUID: pbp1734315260803
Ixiasoft
3.3.8.5.3. Using Triggers
A debugger can use hardware triggers to halt a hart (or enter Debug Mode) when a certain event occurs. In Nios® V processor, the supported trigger type is address/data match trigger. Thus, the associated events are related to address and data trigger implementation only. When a debugger wants to set a trigger, the debugger writes the desired configuration, and then reads back to see if that configuration is supported.
Name | Address | Description |
---|---|---|
tdata1 | 0x105c | action=1, match=0, m=1, s=1, u=1, execute=1 |
tdata2 | 0x80001234 | address |
Name | Address | Description |
---|---|---|
tdata1 | 0x4159 | timing-1, action=1, match=0, m=1, s=1, u=1, load=1 |
tdata2 | 0x80007f80 | address |
Name | Address | Description |
---|---|---|
tdata1 0 | 0x195a | action=1, chain=1, match=2, m=1, s=1, u=1, store=1 |
tdata2 0 | 0x80007c80 | start address (inclusive) |
tadata1 1 | 0x11da | action=1, match=3, m=1, s=1, u=1, store=1 |
tdata2 1 | 0x80007cf0 | end address (exclusive) |
Name | Address | Description |
---|---|---|
tdata1 | 0x10da | action=1. match=1, m=1, s=1, u=1. store=1 |
tdata2 | 0x81237fff | 16 bits to match exactly, then 0, then all ones |
Name | Address | Description |
---|---|---|
tdata1 0 | 0x41a59 | timing=1, action=1, chain=1, match=4, m=1, s=1. u=1, load=1 |
tdata2 0 | 0xfff03090 | Mask for low half, then match for low half |
tadata1 1 | 0x412d9 | timing=1, action=1, match=5, m=1, s=1, u=1, load=1 |
tdata2 1 | 0xefff8675 | Mask for high half, then match for high half |