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4.3.1. General-Purpose Register File
4.3.2. Arithmetic Logic Unit
4.3.3. Multipy and Divide Units
4.3.4. Floating-Point Unit
4.3.5. Custom Instruction
4.3.6. Reset and Debug Signals
4.3.7. Control and Status Registers
4.3.8. Trap Controller
4.3.9. Memory and I/O Organization
4.3.10. RISC-V based Debug Module
4.3.11. Error Correction Code (ECC)
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Ixiasoft
1. Overview
Updated for: |
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Intel® Quartus® Prime Design Suite 24.2 |
The Nios® V processor is a soft processor core with the following characteristics:
- Designed for Intel® FPGA devices and based on RISC-V* specification
- Does not include peripherals or the connection logic to external devices
- Includes only the circuitry required to implement the Nios® V processor architecture
The following table lists the available variants:
Processor Core | Variant |
---|---|
Nios® V/c | Compact Microcontroller |
Nios® V/m | Microcontroller |
Nios® V/g | General-purpose processor |
Figure 1. Nios® V Processor System on Intel® FPGA