AN 745: Design Guidelines for DisplayPort Intel® FPGA IP Interface

ID 683623
Date 4/13/2020
Public

1.1.1. Main Link

The DisplayPort Intel® FPGA IP Main Link is a unidirectional, high-bandwidth channel used to transport video and audio data.
Figure 2. Main Link Differential Pair with FPGA Transceiver PHYThis figure shows a Main Link differential pair. The DisplayPort Intel® FPGA IP source must have AC-coupling capacitors. AC-coupling for DisplayPort Intel® FPGA IP sink is optional.