2024.02.20 |
Updated the HPS_COLD_nRESET Pin Function, including new information for FPGA Boot First, HPS Boot First, HPS Pin-triggered Cold Reset, and HPS Mailbox-triggered Cold Reset. |
2023.09.19 |
Updated the following sections regarding "Reset Sequences" and Preserving SDRAM contents":
- Warm Reset Sequence
- Watchdog Reset Sequence
- Preserving SDRAM Contents
|
2023.08.16 |
Updated the links to the HTML and Zip files in the Address Map and Register Descriptions section. |
2023.04.10 |
Made the following changes:
- Added new topic: Preserving SDRAM Contents
- Updated product family name to " Agilex™ 7".
|
2023.01.19 |
Added the HPS_COLD_nRESET Pin Function section |
2021.07.06 |
Updated the AXI* bridge naming to match the Quartus® Prime software. |
2021.03.09 |
Updated information about HPS_COLD_nRESET in Reset Manager. |
2021.02.23 |
Changed the "self-refresh" information in:
- Reset Handshaking
- Warm Reset Sequence
|
2020.07.30 |
Corrected the following signal callouts:
- s2f_cold_rst_n to s2f_cold_rst
- s2f_rst_n to s2f_rst
- s2f_watchdog_rst_n to s2f_watchdog_rst
|
2020.06.30 |
Added a clarification note under HPS Reset Domains. |
2020.01.25 |
Added a new section: HPS-to-FPGA Reset Sequence. |
2019.09.30 |
Added links to access the complete HPS address map and register definitions. |
2019.07.01 |
Corrected steps in section: Warm Reset Sequence. |
2019.04.02 |
Initial release. |