Intel® FPGA RTE for OpenCL™ Standard Edition: Getting Started Guide

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ID 683550
Date 9/24/2018
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Document Table of Contents
Document Table of Contents x
1. Intel® FPGA RTE for OpenCL™ Standard Edition Getting Started Guide 2. Getting Started with the Intel® FPGA RTE for OpenCL™ Standard Edition for 64-Bit Windows 3. Getting Started with the Intel® FPGA RTE for OpenCL™ Standard Edition for x86_64 Linux Systems 4. Getting Started with the Intel® FPGA RTE for OpenCL™ Standard Edition for Intel® ARMv7-A SoC FPGA A. Document Revision History of the Intel® FPGA RTE for OpenCL™ Standard Edition Getting Started Guide
1. Intel® FPGA RTE for OpenCL™ Standard Edition Getting Started Guide x
1.1. Prerequisites for the Intel® FPGA RTE for OpenCL™ Standard Edition 1.2. Contents of the Intel® FPGA RTE for OpenCL™ Standard Edition 1.3. RTE Utility 1.4. Overview of the Intel® FPGA RTE for OpenCL™ Standard Edition Setup Process
1.3. RTE Utility x
1.3.1. Displaying the Software Version 1.3.2. Listing the Intel® FPGA RTE for OpenCL™ Standard Edition Utility Command Options 1.3.3. Managing an FPGA Board 1.3.4. Managing Host Application
2. Getting Started with the Intel® FPGA RTE for OpenCL™ Standard Edition for 64-Bit Windows x
2.1. Downloading the Intel® FPGA RTE for OpenCL™ Standard Edition 2.2. Installing the Intel® FPGA RTE for OpenCL™ 2.3. Setting the Intel® FPGA RTE for OpenCL™ Standard Edition User Environment Variables 2.4. Verifying Software Installation 2.5. Installing an FPGA Board 2.6. Updating the Hardware Image on the FPGA 2.7. Executing an OpenCL Kernel on an FPGA 2.8. Uninstalling the Software 2.9. Uninstalling the FPGA Board
2.6. Updating the Hardware Image on the FPGA x
2.6.1. Querying the Device Name of Your FPGA Board 2.6.2. Programming the Flash Memory of an FPGA
2.7. Executing an OpenCL Kernel on an FPGA x
2.7.1. Building the Host Application 2.7.2. Running the Host Application 2.7.3. Output from Successful Kernel Execution
3. Getting Started with the Intel® FPGA RTE for OpenCL™ Standard Edition for x86_64 Linux Systems x
3.1. Downloading the Intel® FPGA RTE for OpenCL™ Standard Edition 3.2. Installing the Intel® FPGA RTE for OpenCL™ 3.3. Setting the Intel® FPGA RTE for OpenCL™ Standard Edition User Environment Variables 3.4. Verifying Software Installation 3.5. Installing an FPGA Board 3.6. Updating the Hardware Image on the FPGA 3.7. Executing an OpenCL Kernel on an FPGA 3.8. Uninstalling the Software 3.9. Uninstalling the FPGA Board
3.6. Updating the Hardware Image on the FPGA x
3.6.1. Querying the Device Name of Your FPGA Board 3.6.2. Programming the Flash Memory of an FPGA
3.7. Executing an OpenCL Kernel on an FPGA x
3.7.1. Building the Host Application 3.7.2. Running the Host Application 3.7.3. Output from Successful Kernel Execution
4. Getting Started with the Intel® FPGA RTE for OpenCL™ Standard Edition for Intel® ARMv7-A SoC FPGA x
4.1. Getting Started with the Intel® FPGA RTE for OpenCL™ Standard Edition for SoC FPGA on Windows 4.2. Getting Started with the Intel® FPGA RTE for OpenCL™ Standard Edition for SoC FPGA on Linux
4.1. Getting Started with the Intel® FPGA RTE for OpenCL™ Standard Edition for SoC FPGA on Windows x
4.1.1. Downloading the Intel® FPGA SDK for OpenCL Standard Edition and the SoC EDS Standard Edition 4.1.2. Installing the Intel® FPGA SDK for OpenCL Standard Edition for SoC FPGA 4.1.3. Installing the Intel® SoC FPGA Embedded Development Suite Standard Edition 4.1.4. Recompiling the Linux Kernel Driver 4.1.5. Installing the Intel FPGA RTE for OpenCL Standard Edition onto the SoC FPGA Board 4.1.6. Installing the Cyclone V SoC Development Kit 4.1.7. Executing an OpenCL Kernel on an SoC FPGA 4.1.8. Uninstalling the Intel® FPGA RTE for OpenCL™ Standard Edition
4.1.6. Installing the Cyclone V SoC Development Kit x
4.1.6.1. Writing an SD Card Image onto the Micro SD Flash Card 4.1.6.2. Configuring the SW3 Switches 4.1.6.3. Setting Up Terminal Connection 4.1.6.4. Setting Environment Variables and Loading OpenCL Linux Kernel Driver 4.1.6.5. Connecting the Board to Network via Ethernet
4.1.6.5. Connecting the Board to Network via Ethernet x
4.1.6.5.1. Ensuring IP Address Acquisition 4.1.6.5.2. Using SSH and SCP
4.1.7. Executing an OpenCL Kernel on an SoC FPGA x
4.1.7.1. Building the Host Application 4.1.7.2. Running the Host Application 4.1.7.3. Output from Successful Kernel Execution on the Cyclone V SoC Development Kit
4.2. Getting Started with the Intel® FPGA RTE for OpenCL™ Standard Edition for SoC FPGA on Linux x
4.2.1. Downloading the Intel® FPGA SDK for OpenCL™ Standard Edition and the SoC EDS Standard Edition 4.2.2. Installing the Intel® FPGA SDK for OpenCL Standard Edition for SoC FPGA 4.2.3. Installing the Intel® SoC FPGA Embedded Development Suite Standard Edition 4.2.4. Recompiling the Linux Kernel Driver 4.2.5. Installing the Intel FPGA RTE for OpenCL Standard Edition onto the SoC FPGA Board 4.2.6. Installing the Cyclone V SoC Development Kit 4.2.7. Executing an OpenCL Kernel on an SoC FPGA 4.2.8. Uninstalling the Intel® FPGA RTE for OpenCL™ Standard Edition
4.2.6. Installing the Cyclone V SoC Development Kit x
4.2.6.1. Writing an SD Card Image onto the Micro SD Flash Card 4.2.6.2. Configuring the SW3 Switches 4.2.6.3. Setting Up Terminal Connection 4.2.6.4. Setting Environment Variables and Loading OpenCL Linux Kernel Driver 4.2.6.5. Connecting the Board to Network via Ethernet
4.2.6.5. Connecting the Board to Network via Ethernet x
4.2.6.5.1. Ensuring IP Address Acquisition 4.2.6.5.2. Mounting a Shared Drive 4.2.6.5.3. Using SSH and SCP
4.2.7. Executing an OpenCL Kernel on an SoC FPGA x
4.2.7.1. Building the Host Application 4.2.7.2. Running the Host Application 4.2.7.3. Output from Successful Kernel Execution on the Cyclone V SoC Development Kit
1. Intel® FPGA RTE for OpenCL™ Standard Edition Getting Started Guide
2. Getting Started with the Intel® FPGA RTE for OpenCL™ Standard Edition for 64-Bit Windows
3. Getting Started with the Intel® FPGA RTE for OpenCL™ Standard Edition for x86_64 Linux Systems
4. Getting Started with the Intel® FPGA RTE for OpenCL™ Standard Edition for Intel® ARMv7-A SoC FPGA
A. Document Revision History of the Intel® FPGA RTE for OpenCL™ Standard Edition Getting Started Guide

4.2.7. Executing an OpenCL Kernel on an SoC FPGA

The procedures outlined in this document are for building and running the host application for the hello_world example design. To execute the hello_world OpenCL™ kernel on your SoC FPGA, you must first create an hello_world.aocx file. For instructions on obtaining the hello_world example design and creating the hello_world.aocx file, refer to the Creating the FPGA Hardware Configuration File of an OpenCL Kernel section of the Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone V SoC Getting Started Guide.

Build your host application using the GCC cross-compiler available with the SoC EDS.

Section Content
Building the Host Application
Running the Host Application
Output from Successful Kernel Execution on the Cyclone V SoC Development Kit

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