AN 889: 8K DisplayPort Video Format Conversion Design Example

Download PDF
ID 683547
Date 5/30/2018
Public
Document Table of Contents
Document Table of Contents x
About the 8K DisplayPort Video Format Conversion Design Example Features of the 8K DisplayPort Video Format Conversion Design Example Getting Started with the 8K DisplayPort Video Format Conversion Design Example Functional Description of the 8K DisplayPort Video Format Conversion Design Example Software Description Revision History for AN 889: 8K DisplayPort Video Format Conversion Design Example
Getting Started with the 8K DisplayPort Video Format Conversion Design Example x
Hardware and Software Requirements Downloading and Installing the Intel 8K DisplayPort Video Format Conversion Design Example Design Files for the Intel 8K DisplayPort Video Format Conversion Design Example Compiling the 8K DisplayPort Video Format Conversion Design Example Viewing and Regenerating the Platform Designer System Compiling the 8K DisplayPort Video Format Conversion Design Example with the Nios II Software Build Tools for Eclipse Setting up the Intel® Arria® 10 GX FPGA Development Kit Board Status LEDs, Push Buttons and DIP Switches Running the 8K DisplayPort Video Format Conversion Design Example
About the 8K DisplayPort Video Format Conversion Design Example
Features of the 8K DisplayPort Video Format Conversion Design Example
Getting Started with the 8K DisplayPort Video Format Conversion Design Example
Functional Description of the 8K DisplayPort Video Format Conversion Design Example
Software Description
Revision History for AN 889: 8K DisplayPort Video Format Conversion Design Example

Compiling the 8K DisplayPort Video Format Conversion Design Example

Intel provides a precompiled board programming file for the design in the master_image directory (pre_compiled.sof) to allow you to run the design without running a full compilation.

STEPS:

  1. In the Intel® Quartus® Prime software, open the top.qpf project file. The downloaded archive creates this file when you unzip the project.
  2. Click File > Open and select ip/dp_rx_tx/dp_rx_tx.ip.
    The parameter editor GUI for the DisplayPort IP opens, showing the parameters for the DisplayPort instance in the design.
  3. Click Generate Example Design (not Generate).
  4. When the generation completes, close the parameter editor.
  5. In File Explorer, navigate to the software directory and unzip the vip_control_src.zip archive to generate the vip_control_src directory.
  6. In a BASH terminal, navigate to software/script and run the shell script build_sw.sh.
    The script builds the Nios II software for the design. It creates both an .elf file that you can download to the board at run time, and a .hex file to compile into the board programming .sof file.
  7. In the Intel® Quartus® Prime software, click Processing > Start Compilation.
    • Intel® Quartus® Prime generates the udx10_dp.qsys Platform Designer system.
    • Intel® Quartus® Prime sets the project to top.qpf.
The compilation creates top.sof in the output_files directory when it completes.
Level Two Title