R-tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example User Guide

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ID 683544
Date 6/20/2022
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Document Table of Contents
Document Table of Contents x
1. About the R-tile Avalon® Streaming Intel® FPGA IP for PCI Express PIO Design Example 2. Quick Start Guide 3. R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example User Guide Archives 4. Document Revision History for the R-tile Avalon® Streaming Intel FPGA IP for PCI Express Design Example User Guide
1. About the R-tile Avalon® Streaming Intel® FPGA IP for PCI Express PIO Design Example x
1.1. Credit Initialization Sequence 1.2. Hardware and Software Requirements
1.1. Credit Initialization Sequence x
1.1.1. Credit Value Initialization and Return 1.1.2. Credit Distribution
2. Quick Start Guide x
2.1. Directory Structure 2.2. Generating the Design Example 2.3. Simulating the Design Example 2.4. Root Port BFM 2.5. Compiling the Design Example 2.6. Installing the Linux Kernel Driver 2.7. Running the Design Example
2.3. Simulating the Design Example x
2.3.1. Steps to Run Simulations 2.3.2. Testbench
2.3.1. Steps to Run Simulations x
2.3.1.1. Siemens EDA QuestaSim* Simulator 2.3.1.2. VCS* Simulator 2.3.1.3. VCS* MX Simulator 2.3.1.4. Xcelium* Simulator
2.3.2. Testbench x
2.3.2.1. Testbench Modules 2.3.2.2. Test Driver Module 2.3.2.3. PIO Design Example
2.4. Root Port BFM x
2.4.1. BFM Memory Map 2.4.2. Configuration Space Bus and Device Numbering 2.4.3. Configuration of Root Port and Endpoint 2.4.4. Issuing Read and Write Transactions to the Application Layer 2.4.5. BFM Procedures and Functions
2.4.5. BFM Procedures and Functions x
2.4.5.1. ebfm_barwr Procedure 2.4.5.2. ebfm_barwr_imm Procedure 2.4.5.3. ebfm_barrd_wait Procedure 2.4.5.4. ebfm_barrd_nowt Procedure 2.4.5.5. ebfm_cfgwr_imm_wait Procedure 2.4.5.6. ebfm_cfgwr_imm_nowt Procedure 2.4.5.7. ebfm_cfgrd_wait Procedure 2.4.5.8. ebfm_cfgrd_nowt Procedure 2.4.5.9. BFM Configuration Procedures 2.4.5.10. BFM Shared Memory Access Procedures 2.4.5.11. BFM Log and Message Procedures 2.4.5.12. Verilog HDL Formatting Functions
2.4.5.9. BFM Configuration Procedures x
2.4.5.9.1. ebfm_cfg_rp_ep Procedure 2.4.5.9.2. ebfm_cfg_decode_bar Procedure
2.4.5.10. BFM Shared Memory Access Procedures x
2.4.5.10.1. Shared Memory Constants 2.4.5.10.2. shmem_write Task 2.4.5.10.3. shmem_read Function 2.4.5.10.4. shmem_display Verilog HDL Function 2.4.5.10.5. shmem_fill Procedure 2.4.5.10.6. shmem_chk_ok Function
2.4.5.11. BFM Log and Message Procedures x
2.4.5.11.1. ebfm_display Verilog HDL Function 2.4.5.11.2. ebfm_log_stop_sim Verilog HDL Function 2.4.5.11.3. ebfm_log_set_suppressed_msg_mask Task 2.4.5.11.4. ebfm_log_set_stop_on_msg_mask Verilog HDL Task 2.4.5.11.5. ebfm_log_open Verilog HDL Function 2.4.5.11.6. ebfm_log_close Verilog HDL Function
2.4.5.12. Verilog HDL Formatting Functions x
2.4.5.12.1. himage1 2.4.5.12.2. himage2 2.4.5.12.3. himage4 2.4.5.12.4. himage8 2.4.5.12.5. himage16 2.4.5.12.6. dimage1 2.4.5.12.7. dimage2 2.4.5.12.8. dimage3 2.4.5.12.9. dimage4 2.4.5.12.10. dimage5 2.4.5.12.11. dimage6 2.4.5.12.12. dimage7
2.7. Running the Design Example x
2.7.1. Running the PIO Design Example
1. About the R-tile Avalon® Streaming Intel® FPGA IP for PCI Express PIO Design Example
2. Quick Start Guide
3. R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example User Guide Archives
4. Document Revision History for the R-tile Avalon® Streaming Intel FPGA IP for PCI Express Design Example User Guide

2.4.5.10.1. Shared Memory Constants

The following constants are defined in altrpcietb_g3bfm_shmem.v. They select a data pattern for the shmem_fill and shmem_chk_ok routines. These shared memory constants are all Verilog HDL type integer.

Table 6.  Constants: Verilog HDL Type INTEGER

Constant

Description

SHMEM_FILL_ZEROS

Specifies a data pattern of all zeros

SHMEM_FILL_BYTE_INC

Specifies a data pattern of incrementing 8-bit bytes (0x00, 0x01, 0x02, etc.)

SHMEM_FILL_WORD_INC

Specifies a data pattern of incrementing 16-bit words (0x0000, 0x0001, 0x0002, etc.)

SHMEM_FILL_DWORD_INC

Specifies a data pattern of incrementing 32-bit DWORDs (0x00000000, 0x00000001, 0x00000002, etc.)

SHMEM_FILL_QWORD_INC

Specifies a data pattern of incrementing 64-bit qwords (0x0000000000000000, 0x0000000000000001, 0x0000000000000002, etc.)

SHMEM_FILL_ONE

Specifies a data pattern of all ones

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