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Serial Flash Mailbox Client IP Modules
Device Family Support
Signals
Register Map
Response Codes
Using the Serial Flash Mailbox Client Intel® FPGA IP
Design Example
Serial Flash Mailbox Client Intel FPGA IP Core User Guide Archives
Document Revision History for the Serial Flash Mailbox Client Intel FPGA IP User Guide
Prerequisites
Generating the Configuration Bitstream
Programming the Flash Memory with the Configuration Bitstream
Reading the Flash Memory Device Status Register
Reading the Flash Memory Device ID
Reading the Flash Memory Device ID Using the Control Command
Erasing Flash Memory
Reading Flash Memory
Writing Flash Memory
Visible to Intel only — GUID: orn1540539353465
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Reading Flash Memory
Here are the steps to read flash memory:
# Write Offset 4 to request access to the flash memory device.
master_write_32 $m $AsmiOpen 0x1
# Write Offset 3 to select the 1st flash memory device attached to the IP.
master_write_32 $m $AsmiChipSelect 0x0
# Writing the address argument to Offset 24 (specify the device address for read operation to 0x03FF0000)
master_write_32 $m $AsmiReadAddr 0x03FF0000
# Writing the command argument to Offset 25 (specify the number of words to read from device is 1)
master_write_32 $m $AsmiReadNumbWords 0x1
# Writing the command argument to Offset 23 (Specify 0x2 to flush out data inside read FIFO)
master_write_32 $m $AsmiReadOp 0x2
# Writing the command argument to Offset 23 (Specify 0x1 to perform read operation)
master_write_32 $m $AsmiReadOp 0x1
# Read Offset 26 to determine the fill level of the internal read data FIFO.
master_read_32 $m $AsmiReadFifoLevel 1
# Read the data stored in read data FIFO via the base address of rd_mem in the IP.
master_read_32 $m $RD_MEM 1
# Write Offset 5 to close access to the flash memory device.
master_write_32 $m $AsmiClose 0x1