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Ixiasoft
Step 1: Getting Started
Step 2: Creating a Design Partition
Step 3: Allocating Placement and Routing Region for a PR Partition
Step 4: Adding the Partial Reconfiguration Controller IP
Step 5: Defining Personas
Step 6: Creating Revisions
Step 7: Compiling the Base Revision
Step 8: Preparing PR Implementation Revisions
Step 9: Programming the Board
Modifying an Existing Persona
Adding a New Persona to the Design
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Ixiasoft
Reference Design Requirements
This reference design requires the following:
- Installation and basic familiarity with the Intel® Quartus® Prime Pro Edition software version 20.3 design flow and project files for the design implementation.
- Connection with the Intel® Arria® 10 GX FPGA development board on the bench.