Intel® Acceleration Stack for Intel® Xeon® CPU with FPGAs Version 1.3.1 Release Notes: Intel FPGA Programmable Acceleration Card N3000-N

ID 683474
Date 6/16/2021
Public

Supported Features

Table 1.  Features of the Intel Acceleration Stack v1.3.1 for Intel FPGA PAC N3000-N
Feature Description
OPAE
  • FPGA enumeration
  • FME device access
  • AFU device access
  • FPGA memory-mapped I/O (MMIO) register access
  • Access Intel® MAX® 10 board management controller (BMC) over SPI bus
  • A bitstreaminfo tool that displays authentication information for *.bin files.
  • Voltage and power monitoring through OPAE commands
  • Memory test over DMA
  • Network loopback (NLB) test
  • Graceful shutdown support using the fpgad tool
  • OPAE software RPMs for use with yum install
Runtime and Development Installers Enables easy installation of the release package for Intel FPGA PAC N3000-N
Security
  • Intel® MAX® 10 Root-of-Trust Implementation
  • Support for Intel® MAX® 10 BMC firmware, Intel® MAX® 10 FPGA images and FPGA static region user image signing
  • OPAE security tools:
    • FPGA secure update (fpgasupdate): Remotely updates bitstreams securely.
    • PACSign: Enables signing of bitstreams. To use this tool, you must have the capability to generate a public/private key pair and your hardware security module (HSM) must support a Public-Key Cryptography Standards (PKCS)#11 compatible application programming interface (API) to the PACSign tool.
    • fpgainfo security command identifies root entry hashes, BMC and user image update counter values and cancelled CSK IDs.
Extended Operating Range
Platform and telemetry support for applications requiring Telcordia Network Equipment-Building System (NEBS) compliance.
  • Board component temperature ratings reviewed and updated
  • Improved heatsink
  • Board Management Controller (BMC) board temperature thresholds modified:
    • Upper warning threshold now 85°C
    • Upper fatal threshold now 100°C