E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 12/13/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.11.9. PMA Direct Interface

The E-Tile Hard IP for Ethernet Intel FPGA IP PMA Direct TX and RX Interfaces are available when you turn on Include alternate ports for 10G/25G channels in 100GE or 1 to 4 10GE/25GE with optional RS-FEC and 1588 PTP variation.

These signals are never connected to the Ethernet hard logic. They are available when you need to switch at run time to PMA modes.

Table 43.  Signals of the PMA Direct Interface

Signal Name

Width

Description

i_sl_tx_pma[ch-1:0] 80

PMA Direct TX datapath for corresponding transceiver.

For all Ethernet cores, this signal does nothing until core is reconfigured at run-time to enter PMA Direct mode.

o_sl_rx_pma[ch-1:0]

80

PMA Direct RX datapath for corresponding transceiver.

For all Ethernet cores, this signal does nothing until core is reconfigured at run-time to enter PMA Direct mode.