Intel® Advanced Link Analyzer: User Guide

ID 683448
Date 4/01/2024
Public
Document Table of Contents

4. Document Revision History for Intel® Advanced Link Analyzer User Guide

Document Version Changes
2024.04.01
  • Added high DPI monitor support.
  • Added Link Builder feature.
2023.10.03
  • Updated JESD204C/D channel/device compliance test support.
  • Updated FEC error analysis support.
2023.07.10 Added Intel Agilex 5 device support.
2023.04.19
  • Updated the product family name to "Intel Agilex 7."
  • Added symbol/FEC error analysis support.
2022.10.18
  • Added custom clock path transmitter and receiver support.
  • Added 100GAUI-1 C2M, 200GAUI-2 C2M, 400GAUI-4 C2M, and CEI-112G-VSR COM/ERL compliance tests.
2022.04.27
  • Updated Intel Agilex PLL naming scheme.
  • Updated jitter analysis usage.
  • Updated ITOL random noise calibration usage.
2021.11.03
  • Improved Intel Agilex F-tile and R-tile support.
  • Added forwarding clock simulation capabilities (beta).
  • Added Low Latency FEC RS (272, 258) modeling support.
  • Improved PAM4 Jnu/Jrms/EOJ analysis performance and accuracy.
  • Updated 106/112Gb/s COM/ERL support.
  • Added 2-port return loss S-parameter handling capabilities.
2021.04.13
  • Improved Intel Agilex F-tile support.
  • Added Intel® Math Kernel Library (MKL) support.
  • Added JESD204 FEC modeling support.
  • Added JESD204C.1 channel compliance test support.
  • Added batch channel compliance test support.
  • Improved PAM4 Jnu/Jrms/EOJ analysis performance and accuracy.
2020.12.16
  • Added support for Intel Agilex R-tile (with wrapper), Intel Agilex F-tile general-purpose transceiver block (with wrapper), Intel Agilex F-tile high-speed transceiver block (with wrapper), PCI Express* 32GT reference transceiver.
  • Added COM and ERL support for IEEE 802.3ck (100GBASE-KR1/CR1, 200GBASE-KR2/CR2, 400GBASE-KR4/CR4, 100GAUI-1 C2C, 200GAUI-2 C2C, 400GAUI-4 C2C, OIF-CEI-112G-LR, OIF-CEI-112G-MR.
  • Added ITOL COM Random Noise Calibration support and wizard.
  • Added COM Analysis wizard.
  • Updated PAM4 Jnu/Jrms analysis.
  • Added noise source bandwidth default settings in System Options.
  • Added options to change simulation sampling rate.
2020.05.05
  • Updated the software library requirements to Visual C++ 2017 and .NET 4.8.
  • Updated SNDR and Pulse and FIR Fitting analysis capabilities and user interfaces.
  • Added PAM4 Jnu/Jrms analysis feature (beta).
  • Added Package Designer.
  • Added pre-simulation and pre-analysis checklists.
  • Added descriptions for how to resolve simulation issues related to legacy Stratix® 10 L-/H-tile receiver IBIS-AMI models due to the software’s write-protection enforcement.
2019.11.04
  • Added support for Stratix® 10 P-tile.
  • Added support for Intel Agilex E-tile and P-tile.
  • Updated work and user directory location settings.
  • Updated the GUI for the main module, Data Viewer, and Channel Viewer.
  • Added floating tap FFE/DFE support in the technology receiver model.
  • Added the XML simulation report in the Data Viewer.
  • Added the 100GBASE-KR (current trending specification draft) COM computation in the Channel Viewer and main module.
  • Improved the COM analysis plot capabilities in the Channel Viewer.
  • Improved the COM results report in the Channel Viewer and main module.
  • Added the Project Archiver/Unarchiver.
  • Added the Intel® Device Model Importer.
  • Added COM support in main module.
2019.05.31
  • Changed Automotive to Military.
  • Changed the storage space system requirement from 4 to 8 GB.
  • Added capability to specify simulation time work directory to improve simulation efficiency.
  • Added full mixed mode simulation for any transmitter and custom receiver.
  • Added Effective Return Loss (ERL) support in Channel Viewer.
  • Added crosstalk extraction capability in Channel Designer.
2018.10.29
  • Changed the storage space system requirement from 3 to 4 GB.
  • Added instructions for how to use local storage space instead of network storage to improve simulation time.
  • Added the ICN simulation method and configuration user interface.
  • Updated CSV Eye Diagram Import and Analysis options for the Data Viewer Module: updated CSV Eye Diagram Data Format 2 and added FEC simulation support.
2018.05.07
  • Added notes on installation and operating storage space’s impact on tool performance.
  • Added Stratix® 10 E-tile support.
  • Added "CSV Eye Diagram Import and Analysis" support in the Data Viewer.
  • Added customizable COM analysis support.
  • Changed the temperature ranges for A10 Industrial from -40 °C to 100 °C and for A10 Automotive from -40 °C to 125 °C.
  • Added Accessing the User Guide.
2017.11.06
  • "JNEye" name changed to "Advanced Link Analyzer."
  • Added Stratix® 10 and Cyclone® 10 GX support.
  • Added a note "For PAM-4 link simulations, Intel recommends to use Height as the FOM to get better results" in FOM of Link Optimization.
  • "CMN" added to the "Transmitter Intrinsic Jitter and Noise Types" table.
  • "InpN" added to the "Receiver Intrinsic Jitter and Noise Types" table.
  • Added a new topic "IBIS-AMI Wrapper".
  • "COM Analyzer" added to "Plot Configuration Panel".
  • Removed 28 Gbps simulation tutorial.
2017.05.08
  • Added PCI Express* 16GT device model.
  • Added new equalization capabilities for receiver technology model.
  • Added common-mode noise model and simulation capability.
  • Added transmitter FIR fitting and SNDR analysis capabilities.
  • Enhanced eye diagram masks capabilities.
2016.10.31
  • Added descriptions for new link components: Repeater/Retimer TX, Repeater/Retimer RX and Noise Source.
  • Added new options in the Channel Analysis and Compliance Module in Intel® Advanced Link Analyzer Channel Viewer.
  • Updated Arria® 10 device model.
2016.05.03
  • Added PCB stackup configuration to the Intel® Advanced Link Analyzer Channel Designer section.
  • Updated the PCI Express* tutorial with new simulation results.
  • Updated the OIF CEI VSR tutorial with simulation results.
  • Updated GUI screenshots to reflect 16.0 changes.
2015.11.02
  • Added coupled stripline and coupled microstrip information to the Intel® Advanced Link Analyzer Channel Designer section.
  • Updated the PCI Express* tutorial with new simulation results.
  • Updated the OIF CEI VSR tutorial with simulation results.
  • Changed Quartus II software references to Quartus Prime software.
  • Updated GUI screenshots to reflect 15.1 changes.
2015.05.04
  • Updated channel compliance check and analysis documentation in the Intel® Advanced Link Analyzer Channel Viewer section.
  • Updated the PCI Express* tutorial with new measurements and results.
  • Updated the OIF VSR tutorial with new configuration and results.
  • Updated most GUI screenshots to reflect 15.0 changes.
2014.12.15
  • Added the Intel® Advanced Link Analyzer Channel Designer section.
  • Added channel compliance check and analysis documentation in the Intel® Advanced Link Analyzer Channel Viewer section.
  • Updated the two tutorials with new measurements and results.
  • Updated all GUI screenshots with new plots.
2014.06.30
  • Incorporated new features of the Intel® Advanced Link Analyzer Channel Viewer.
  • Added new waveform display feature.
  • Updated the Arria® 10 models.
  • Updated all GUI screenshots with new plots.
2013.12.09 Initial release.