Advanced Link Analyzer: User Guide

ID 683448
Date 11/03/2021
Public

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Document Table of Contents

1. System Requirements and Installation Guide

Updated for:
Intel® Quartus® Prime Design Suite 21.3

Advanced Link Analyzer is a high-speed transceiver link simulator. When you design high-speed, multi-gigabit transceiver links, you must ensure the end-to-end performance from transmitter (TX) to receiver (RX) and all interconnects in between.

Advanced Link Analyzer's graphical user interface (GUI) and link simulator allows you to quickly and easily set up and evaluate high-speed link performance early in your design cycle. Advanced Link Analyzer also helps you identify possible issues in board level design. With Advanced Link Analyzer, you can quickly estimate optimal link equalization and other electrical parameter settings for transmitter and receiver. You can also use Advanced Link Analyzer to predict link performance such as jitter and noise at a small probability level.

Advanced Link Analyzer can simulate serial links with clock-forwarding structure. In this structure, a dedicated clock path is used to transmit clock signal that the receiver uses for timing resolution tasks, such as equalization and data determination. To simulate clock-forwarding serial link, you need a clock signal IBIS-AMI transmitter and an IBIS-AMI receiver model that supports input clock signal. Currently, Advanced Link Analyzer supports clock-forwarding IBIS-AMI models as per Buffer Issue Resolution Documents (BIRD) 197, 204, 208, and 209 listed on the IBIS Open Forum.

Note: The clock path simulation support is a beta feature in the Intel® Quartus® Prime software version 21.3.