Stratix® 10 Embedded Memory User Guide

ID 683423
Date 3/29/2024
Public

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4.5.1. Release Information for Shift Register (RAM-based) Intel® FPGA IP

Intel® FPGA IP versions match the Quartus® Prime Design Suite software versions until v19.1. Starting in Quartus® Prime Design Suite software version 19.2, Intel® FPGA IP has a new versioning scheme.

The Intel® FPGA IP version (X.Y.Z) number can change with each Quartus® Prime software version. A change in:

  • X indicates a major revision of the IP. If you update the Quartus® Prime software, you must regenerate the IP.
  • Y indicates the IP includes new features. Regenerate your IP to include these new features.
  • Z indicates the IP includes minor changes. Regenerate your IP to include these changes.
Table 63.  Shift Register (RAM-based) Intel® FPGA IP Current Release Information

Item

Description

IP Version

19.1.0
Quartus® Prime Version

20.3

Release Date

2020.10.05