10Gbps Ethernet Accelerator Functional Unit (AFU) Design Example User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

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ID 683422
Date 4/30/2019
Public
Document Table of Contents
Document Table of Contents x
1. About this Document 2. Overview 3. Running the Design Example Tests 4. Using the Design Example as a Platform for Further Evaluation 5. 10Gbps Ethernet AFU Design Example User Guide Archives A. Document Revision History for 10Gbps Ethernet AFU Design Example User Guide
1. About this Document x
1.1. Intended Audience 1.2. Conventions 1.3. Acronym List 1.4. Acceleration Glossary
2. Overview x
2.1. 10GbE Design Example AFU Hardware 2.2. 10GbE Design Example AFU Software
3. Running the Design Example Tests x
3.1. Setup Prerequisites 3.2. Running 10GbE Internal Loopback Test in Single Intel® PAC System 3.3. Running 10GbE External Loopback Test in Single Intel® PAC System 3.4. Running 10GbE Intel® PAC-to-PAC Test between two connected Intel® PACs
4. Using the Design Example as a Platform for Further Evaluation x
4.1. Prerequisite while Evaluating with the Intel FPGA MAC IP 4.2. Evaluation with an Alternate MAC IP
1. About this Document
2. Overview
3. Running the Design Example Tests
4. Using the Design Example as a Platform for Further Evaluation
5. 10Gbps Ethernet AFU Design Example User Guide Archives
A. Document Revision History for 10Gbps Ethernet AFU Design Example User Guide

4.2. Evaluation with an Alternate MAC IP

You can use the 10GbE AFU example as a framework to evaluate MAC IP from third parties or your own IP. The design example instantiates the Intel FPGA MAC IP in the following AFU RTL source file: 
OPAE_PLATFORM_ROOT/hw/samples/eth_e2e_e10/hw/rtl/e10/altera_eth_10g_mac_base_r.v
Replace the altera_eth_10g_mac:mac_inst instance shown in this figure with your own MAC IP instance. You must provide any necessary wrapper shim logic to integrate your IP within the AFU design example framework. You can control the number of MAC IP instances that are instantiated through the NUM_ETH parameter in the following AFU RTL source file: 
OPAE_PLATFORM_ROOT/hw/samples/eth_e2e_e10/hw/rtl/eth_e2e_e10.v
Figure 4. 10GbE AFU Design Example Hierarchy
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