AN 861: Intel® Stratix® 10 H-Tile PCI Express* Link Hardware Validation

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ID 683407
Date 6/29/2018
Public
Document Table of Contents
Document Table of Contents x
1. Intel® Stratix® 10 H-Tile PCIe* Link Hardware Validation
1. Intel® Stratix® 10 H-Tile PCIe* Link Hardware Validation x
1.1. Overview 1.2. Hardware Validation System Block Diagram 1.3. Hardware and Software Requirements 1.4. Quick Start Guide 1.5. Document Revision History
1.3. Hardware and Software Requirements x
1.3.1. Hardware Requirements 1.3.2. Software Requirements
1.4. Quick Start Guide x
1.4.1. Hardware Setup 1.4.2. Running the Reference Design 1.4.3. Hardware Validation
1.4.2. Running the Reference Design x
1.4.2.1. Generating the Design 1.4.2.2. Compiling the Design Example and Programming the Device
1.4.3. Hardware Validation x
1.4.3.1. Hardware Validation on the Linux Platform 1.4.3.2. Hardware Validation on the Windows Platform
1.4.3.1. Hardware Validation on the Linux Platform x
1.4.3.1.1. Linux Kernel Driver 1.4.3.1.2. Installing the Linux Kernel Driver 1.4.3.1.3. Running the Design Example Application
1.4.3.2. Hardware Validation on the Windows Platform x
1.4.3.2.1. Installing the Windows driver 1.4.3.2.2. Running the Windows demo driver with design example
1. Intel® Stratix® 10 H-Tile PCIe* Link Hardware Validation

1.1. Overview

The Intel® Stratix® 10 Hard IP for PCI Express* IP core includes a programmed I/O (PIO) design example to help you understand the usage for this IP. The PIO design example transfers data from the host memory to the local memory on a target device, which in this case is an Intel FPGA. This design example is appropriate for low-bandwidth applications. In the PCIe* link hardware validation process, this design example serves as an Endpoint (EP) that interacts with the host, which is the Root Port. The same design example can be used in your hardware to validate if a PCIe* link is working as expected. The Intel® Stratix® 10 GX FPGA Development Kit with H-Tile device is used in the hardware validation process. This validation is performed on both the Linux* and Windows* platforms.

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