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1.1. Prerequisites for the Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Toolkit
1.2. Overview of the Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform
1.3. Custom Platform Automigration for Forward Compatibility
1.4. Creating an Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform
1.5. Applying for the Intel® FPGA SDK for OpenCL™ Standard Edition Preferred Board Status
1.6. Shipping Recommendations
1.7. Intel® FPGA SDK for OpenCL™ Standard Edition Custom Platform Design Revision History
2.3.1. aocl_mmd_get_offline_info
2.3.2. aocl_mmd_get_info
2.3.3. aocl_mmd_open
2.3.4. aocl_mmd_close
2.3.5. aocl_mmd_read
2.3.6. aocl_mmd_write
2.3.7. aocl_mmd_copy
2.3.8. aocl_mmd_set_interrupt_handler
2.3.9. aocl_mmd_set_status_handler
2.3.10. aocl_mmd_yield
2.3.11. aocl_mmd_shared_mem_alloc
2.3.12. aocl_mmd_shared_mem_free
2.3.13. aocl_mmd_reprogram
2.3.14. aocl_mmd_hostchannel_create
2.3.15. aocl_mmd_hostchannel_destroy
2.3.16. aocl_mmd_hostchannel_get_buffer
2.3.17. aocl_mmd_hostchannel_ack_buffer
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2.2.8. compile
The compile element of the board_spec.xml file and its associated attributes and parameters describe the general control of Intel® Quartus® Prime compilation, registration, and automigration.
Example XML code:
<compile project="top" revision="top" qsys_file="none" generic_kernel="1">
<generate cmd="echo"/>
<synthesize cmd="quartus_sh -t import_compile.tcl"/>
<auto_migrate platform_type="s5_net" >
<include fixes=""/>
<exclude fixes=""/>
</auto_migrate>
</compile>
Attribute | Description |
---|---|
project | Name of the Intel® Quartus® Prime project file (.qpf) that the Intel® Quartus® Prime Standard Edition software intends to compile. |
revision | Name of the revision within the Intel® Quartus® Prime project that the Intel® Quartus® Prime Standard Edition software compiles to generate the Intel® FPGA SDK for OpenCL™ Offline Compiler executable file (.aocx). |
qsys_file | Name of the Platform Designer (Standard) file into which the OpenCL™ kernel is embedded. You have the option to assign a value of "none" to qsys_file if you do not require the Intel® Quartus® Prime Standard Edition software to create a top-level .qsys file for your design. |
generic_kernel | Set this value to 1 if you want the offline compiler to generate a common Verilog interface for all OpenCL compilations. This setting is necessary in situations where you must set up Intel® Quartus® Prime design partitions around the kernel, such as in the Configuration via Protocol (CvP) flow. |
generate_cmd | Command required to prepare for full compilation, such as to generate the Verilog files for the Platform Designer (Standard) system into which the OpenCL kernel is embedded. |
synthesize_cmd | Command required to generate the fpga.bin file from the Custom Platform. Usually, this command instructs the Intel® Quartus® Prime Standard Edition software to perform a full compilation. |
auto_migrate |
|