2017.11.06 |
17.1 |
- Added support for Intel® Cyclone® 10 devices.
- Removed bit-reversed option.
- Removed input and output orders topic.
|
2017.01.14 |
16.1.1 |
- Removed DC centred option from variable streaming input and output option orders.
- Removed product ID and vendor ID codes.
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2016.11.11 |
16.1 |
Added note about fftpts signal. |
2016.08.01 |
16.1S10 |
Added support for Stratix 10 devices |
2016.05.01 |
16.0 |
Added MATLAB simulation flow. |
2015.10.01 |
15.1 |
Added more info to sink_data and source_data signals |
2014.12.15 |
14.1 |
- Added more detail to source_data and sink_data signal descriptions.
- Added hard-floating point option for Arria 10 devices in the Complex Multiplier Options
- Reworded DSP Block Resource Optimization description
- Added block floating point option in parameters table.
- Reordered parameters in parameters table.
- Removed the following parameters:
- Twiddle ROM Distribution
- Use M-RAM or M144K blocks
- Implement appropriate logic functions in RAM
- Structure
- Implement Multipliers in
- Global enable clock signal
- Removed Stratix V devices only comment for DSP Resource Optimization parameter.
- Added final support for Arria 10 and MAX 10 devices
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August 2014 |
14.0 Arria 10 Edition |
- Added support for Arria 10 devices.
- Added new source_data bus description.
- Added Arria 10 generated files description.
- Removed table with generated file descriptions.
- Removed clk_ena
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June 2014 |
14.0 |
- Removed Cyclone III and Stratix III device support
- Added support for MAX 10 FPGAs.
- Added instructions for using IP Catalog
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November 2013 |
13.1 |
- Added more information to variable streaming I/O dataflow.
- Removed device support for following devices:
-
- HardCopy II, HardCopy III, HardCopy IV E, HardCopy IV GX
- Stratix, Stratix GX, Stratix II, Stratix II GX
- Cyclone, Cyclone II
- Arria GX
|
November 2012 |
12.1 |
Added support for Arria V GZ devices. |