DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 9/30/2024
Public
Document Table of Contents

6.5. DSP Builder Finite State Machine Design Example

The Finite State Machine example design demonstrates some of the features of the finite state machine (FSM) specification and its function in a primitive subsystem. The model file is demo_fsm.mdl. It comprises several example primitive subsystems that use the Finite State Machine block for different use cases.