Low Latency 100G Ethernet Intel® Agilex™ FPGA IP Design Example User Guide

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ID 683315
Date 12/14/2020
Public
Document Table of Contents
Document Table of Contents x
1. Quick Start Guide 2. Design Example Description 3. Document Revision History for the Low Latency 100G Ethernet Intel Agilex FPGA IP Design Example User Guide
1. Quick Start Guide x
1.1. Generating the Design Example 1.2. Directory Structure 1.3. Simulating the Design Example Testbench 1.4. Compiling the Compilation-Only Project 1.5. Compiling and Configuring the Design Example in Hardware 1.6. Testing the Low Latency 100G Ethernet Intel Agilex FPGA Intel® FPGA IP Design in Hardware
1.1. Generating the Design Example x
1.1.1. Design Example Parameters
1.6. Testing the Low Latency 100G Ethernet Intel Agilex FPGA Intel® FPGA IP Design in Hardware x
1.6.1. Testing the Hardware Design Example using Ethernet Toolkit
2. Design Example Description x
2.1. Features 2.2. Hardware and Software Requirements 2.3. Simulation 2.4. Design Example Behavior 2.5. Design Example Registers 2.6. Design Example Interface Signals
2.5. Design Example Registers x
2.5.1. Packet Generator Programming Sequence
1. Quick Start Guide
2. Design Example Description
3. Document Revision History for the Low Latency 100G Ethernet Intel Agilex FPGA IP Design Example User Guide

1.5. Compiling and Configuring the Design Example in Hardware

The Intel® FPGA IP core parameter editor allows you to compile and configure the design example on a target development kit.
To compile and configure a design example on hardware, follow these steps:
  1. Launch the Intel® Quartus® Prime Pro Edition software and select Processing > Start Compilation to compile the design.
  2. After you generate an SRAM object file .sof, follow these steps to program the hardware design example on the Intel device:
    1. Select Tools > Programmer.
    2. In the Programmer, click Hardware Setup.
    3. Select a programming device.
    4. Select and add the Intel® Agilex™ device to your Intel® Quartus® Prime Pro Edition session.
    5. Ensure that Mode is set to JTAG.
    6. Select the Intel device and click Add Device. The Programmer displays a block diagram of the connections between the devices on your board.
    7. In the row with your .sof, check the box for the .sof.
    8. Turn on Program/Configure option for the .sof.
    9. Click Start.
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