Arria V GZ Avalon-ST Interface for PCIe Solutions: User Guide

ID 683297
Date 12/21/2020
Public
Document Table of Contents

10.1.5. Slot Power Limit Message

The PCI Express Base Specification Revision states that this message is not mandatory after link training.

Table 72.  Slot Power Message

Message

Root Port

Endpoint

Generated by

Comments

App Layer

Core

Core (with App Layer input)

Set Slot Power Limit

Transmit

Receive

No

Yes

No

In Root Port mode, through software.