Intel® Quartus® Prime Pro Edition Settings File Reference Manual

ID 683296
Date 4/04/2022
Public

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Document Table of Contents

UNFORCE_MERGE_PLL

Prevents the specified PLL to be merged with the master PLL. Use this option only for two compatible PLLs driven by the same clock source.

Type

Boolean

Device Support

  • Intel® Agilex™
  • Intel® Arria® 10
  • Intel® Cyclone® 10 GX
  • Intel® Stratix® 10

Notes

This assignment supports Fitter wildcards.

This assignment is included in the Fitter report.

Syntax


set_instance_assignment -name UNFORCE_MERGE_PLL -to <to> -entity <entity name> <value>