AN 881: PCI Express* Gen3 x16 Avalon® Memory Mapped (Avalon-MM) DMA with DDR4 SDRAM and HBM2 Memories Reference Design

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ID 683291
Date 4/19/2021
Public
Document Table of Contents
Document Table of Contents x
1. Introduction 2. Reference Design Description 3. Understanding PCI Express* throughput 4. Document Revision History for AN 881: PCI Express* Gen3 x16 Avalon® Memory Mapped (Avalon-MM) DMA with External and HBM2 Memories Reference Design
1. Introduction x
1.1. PCI Express Gen3 x16 Avalon-MM DMA with External and HBM2 Memory Hardware and Software Requirements 1.2. Avalon-MM Bridge with DMA Module Description 1.3. DMA Procedure Steps 1.4. Setting Up the Hardware 1.5. Installing the DMA Test Driver and Running the Linux DMA Software
2. Reference Design Description x
2.1. Project Hierarchy 2.2. Parameter Settings for PCI Express* Hard IP Variations 2.3. PCIe Avalon-MM DMA Reference Design with External and HBM2 Memories Platform Designer System 2.4. Intel Stratix 10 MX DMA Memory Throughput
3. Understanding PCI Express* throughput x
3.1. Throughput for Posted Writes 3.2. Throughput for Reads
3.1. Throughput for Posted Writes x
3.1.1. Specifying the Maximum Payload Size
3.2. Throughput for Reads x
3.2.1. Understanding Throughput Measurement
1. Introduction
2. Reference Design Description
3. Understanding PCI Express* throughput
4. Document Revision History for AN 881: PCI Express* Gen3 x16 Avalon® Memory Mapped (Avalon-MM) DMA with External and HBM2 Memories Reference Design

1.1. PCI Express Gen3 x16 Avalon-MM DMA with External and HBM2 Memory Hardware and Software Requirements

Hardware Requirements

The reference design runs on the following development kits:
  • Intel® Stratix® 10 FPGA MX development kit (using a DDR4 HiLo module and an HBM2 memory). This development kit uses a 1SM21BHU2F53E2VG Intel® Stratix® 10 device.
The reference design requires two computers:
  • A computer with a PCIe* Gen3 x16 slot running Linux. This computer is computer number 1.
  • A second computer with the Intel® Quartus® Prime Pro Edition software version 19.2 installed. This computer downloads the FPGA SRAM Object File (.sof) to the FPGA on the development kit. This computer is computer number 2.

Software Requirements

  • The reference design software is installed on computer number 1. The reference design is available in the Intel FPGA Design Store. The Intel® Quartus® Prime Pro Edition Platform Archive File (.par) includes the recommended synthesis, fitter, and timing analysis settings for the parameters specified in the reference design.
  • The Intel® Quartus® Prime Pro Edition software is installed on computer number 2.
  • The Linux driver is configured specifically for this reference design.
Note: The driver was developed and tested on CentOS 7.0, 64-bit with 3.10.514 kernel compiled for the x86_64 architecture.

Related Information

  • Intel® Stratix® 10 PCI Express* Gen3 x16 Avalon® -MM DMA with DDR4 SDRAM and HBM2 Memories Reference Design
To download the design software, go to:
Level Two Title