O-RAN Intel® FPGA IP User Guide

Download PDF
ID 683238
Date 2/01/2024
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents
Document Table of Contents x
1. About the O-RAN Intel® FPGA IP 2. Getting Started with the O-RAN Intel® FPGA IP 3. O-RAN IP Functional Description 4. O-RAN IP Registers 5. O-RAN Intel FPGA IP User Guide Archive 6. Document Revision History for the O-RAN Intel® FPGA IP User Guide
1. About the O-RAN Intel® FPGA IP x
1.1. O-RAN Intel® FPGA IP Features 1.2. O-RAN Intel® FPGA IP Device Family Support 1.3. Release Information for the O-RAN Intel® FPGA IP 1.4. O-RAN Intel® FPGA IP Performance and Resource Utilization
2. Getting Started with the O-RAN Intel® FPGA IP x
2.1. Obtaining, Installing, and Licensing the O-RAN IP 2.2. Parameterizing the O-RAN IP 2.3. Generated IP File Structure
2.2. Parameterizing the O-RAN IP x
2.2.1. O-RAN IP Parameters
3. O-RAN IP Functional Description x
3.1. O-RAN IP Signals 3.2. O-RAN Intel® FPGA IP Error Handling 3.3. O-RAN Reset Transactions 3.4. O-RAN IP Streaming Mode 3.5. O-RAN IP Performance Counters 3.6. O-RAN IP Transmission and Reception Window Threshold 3.7. O-RAN IP Fragmentation 3.8. O-RAN IP U-Plane Packet Size
3.6. O-RAN IP Transmission and Reception Window Threshold x
3.6.1. O-RAN IP Examples for Transmission and Reception Window Thresholds
1. About the O-RAN Intel® FPGA IP
2. Getting Started with the O-RAN Intel® FPGA IP
3. O-RAN IP Functional Description
4. O-RAN IP Registers
5. O-RAN Intel FPGA IP User Guide Archive
6. Document Revision History for the O-RAN Intel® FPGA IP User Guide

6. Document Revision History for the O-RAN Intel® FPGA IP User Guide

Date IP Version Intel® Quartus® Prime Software Version Changes
2024.02.01 2.1.0 23.4
  • Added support for Intel Agilex® 5 and Intel Agilex® 9 devices
  • Added Fragmentation Supported Number of eAxC Channel(s) parameter
  • Updated O-RAN IP Fragmentation for sequence ID per eAxC ID support:
    • Changed "... starts with a raw packet value on first fragment" to "... starts with zero on first fragment"
    • Updated Fragmentation table description and values
2023.11.27 2.0.0 23.3
  • Added support for all section extension types
  • Added application layer fragmentation for U-plane and C-plane
  • Added Enable 30 kHz subcarrier spacing parameter
  • Removed Programmable U-Plane Fragmentation Size (Number of PRBs) and Programmable C-Plane Fragmentation Size (Number of Bytes) parameters.
  • Updated Transmission Window for long PRACH, short PRACH, and PUSCH support
  • Added ext_scs_sel to Application Interface Transmitter User Plane Signals
  • Added rx_c_numberofSections, rx_c_symInc to Application Interface Receiver Control Plane Signals
  • Corrected reset_tx_n and reset_rx_n to rst_tx_n and rst_rx_n in O-RAN Reset Transactions
  • Updated O-RAN IP Fragmentation for handling by Ethernet frame size
  • Added O-RAN IP U-Plane Packet Size
  • Added description to O-RAN IP Regsiters
2023.08.23 1.9.2 23.2 No changes
2023.08.15 1.9.1 23.1
  • Added "the O-RAN Design Example does not support window monitoring or application layer fragmentation" to
    • Parameterizing the O-RAN IP
    • O-RAN IP Parameters
    • O-RAN IP Fragmentation
  • Added "the O-RAN Design Example does not support window monitoring" to
    • O-RAN IP Functional Description
    • O-RAN IP Transmission and Reception Window Threshold
  • Added "the O-RAN Design Example does not C-plane fragmentation" and "the O-RAN Design Example does not U-plane fragmentation" to
    • O-RAN IP Parameters
  • Added "the O-RAN Design Example does not support application layer fragmentation" to
    • O-RAN IP Fragmentation
2023.05.04 1.9.1 23.1
  • Updated the product family name to "Intel Agilex 7."
  • Added O-RAN IP Examples for Transmission and Reception Window Thresholds
2023.03.01 1.9.0 22.4
  • Added more information on compression ratio of 16.
  • Added C- and U-plane fragmentation parameters
  • Added O-RAN IP Fragmentation
  • Added functional_mode Register to O-RAN IP Registers
2023.01.24 1.6.0 21.4
  • Corrected reset signal names to rst_csr_n, rst_rx_n, and rst_tx_n
  • Deleted avst_source_error from Transmitter Signals
  • Deleted avst_sink_ready from Receiver Signals
  • Corrected rx_seq_id to rx_u_seq_idin User Plane Signals
2023.01.10 1.6.0 21.4 Corrected t2a and Ta3 examples in O-RAN IP Transmission and Reception Window Threshold
2022.11.30 1.6.0 21.4
  • Corrected the following timing diagrams:
    • Application Transmitter Interface Control Plane Timing Diagram avst_sink_c_ext_endofpacket and avst_sink_c_ext_endofpacket signals
    • Application Interface Receiver Control Plane Timing Diagram avst_source_c_ext_endofpacket and avst_source_c_ext_endofpacket signals and all avst_sink instances to avst_source
    • Application Interface Receiver User Plane Timing Diagram avst_source_u_error changed to low and deleted avst_source_u_ready signals
  • Corrected rx_ext_sectionType to output in Control Plane Signals table
  • In User plane signals table
    • Changed avst_sink_u_startofpacket to avst_source_u_startofpacket
    • avst_sink_u_valid to avst_source_u_valid
    • Changed description of avst_source_u_data
    • Changed description of rx_sec_hdr_valid
2022.07.08 1.6.0 21.4
  • Added various references to the O-RAN IP Design Example User Guide to clarify design example specific parameters.
  • Removed mention of C_Sectiontype and C_NumberofSections,in Application Transmitter Interface Control Plane Timing Diagram and Transport Transmitter Interface Timing Diagram, as they are design example paramters.
  • Corrected timing diargam signal names
2022.06.20 1.6.0 21.4
  • Corrected Application Interface Receiver Control Plane Timing Diagram
  • Changed support for CAT-A RU (up to 16 spatial streams) from 8 to 16
2022.04.06 1.6.0 21.4
  • Changed tx_u_numPrb to 1 from 129 in Application Interface Transmitter User Plane Timing Diagram.
  • Changed rx_u_numPrb to 1 from 129 in Application Interface Receiver User Plane Timing Diagram.
  • Changed tx_c_sectiontype to 1 from 0 in C-plane packet waveform
  • Removed avst_source_c_ready avst_source_c_ext_ready from Control Plane Signals.
  • Removed avst_source_u_ready from User Plane Signals.
       
2022.03.04 1.6.0 21.4
  • Added Device Supported Speed Grades table
  • Changed two parameters:
    • Block-floating point compression
    • Mu-law compression
  • Corrected signal rx_rf to rx_ef.
  • Swapped following signal descriptions:
    • avst_sink_u_data and avst_source_data.
    • avst_sink_data and avst_source_u_data
  • Corrected tx_size value in U-plane packet waveform figure
  • Corrected description of tx_lanes_stable and rx_pcs_ready
  • Removed invalid numPrb for U-plane data in Error Handling table
2021.12.17 1.5.1 21.3
  • Updated performance and resources
  • Added legal range for number of sections
  • Added more description to Maximum Ethernet frame size parameter
2021.11.03 1.5.1 21.2
  • Corrected Reception Window figure
2021.09.15 1.5.1 21.2
  • Corrected readyLatency in Receiver Signals table
2021.08.11 1.4.0 21.1
  • Corrected csr_read in CSR Signals table
2021.06.17 1.4.0 21.1
  • Corrected readyLatency in Transmitter Signals table
2021.06.10 1.4.0 21.1
  • Added support for F-tile devices
  • Moved rx_sec_hdr_valid signal from control plane to user plane table
2021.04.22 1.3.0 20.4
  • Added more signals to C-plane packet waveform
  • Updated tx_total_low, tx_total_high, tx_total_c_low, and tx_total_c_high register addresses
2021.03.20 1.3.0 20.4 Added:
  • New registers.
  • Performance Counters
  • O-RAN IP Transmission and Reception Window Threshold
  • Support for section extensions.
  • Compression ratios of 8, 9, 10, 11, 12, 13, 14, 15, 16.
  • Section type 3
2021.01.25 1.0.0 20.2
  • Changed product ordering code.
2020.09.04 1.0.0 20.2 Initial release.
Level Two Title