Visible to Intel only — GUID: mwh1410471236492
Ixiasoft
Visible to Intel only — GUID: mwh1410471236492
Ixiasoft
3.3.1.5.1. Global and Non-Global Usage
The figure shows an example of inefficient use of a global clock. The highlighted line has a single fan-out from a global clock.
If you assign these resources to a Regional Clock, the Global Clock becomes available for another signal. You can ignore signals with an empty value in the Global Line Name column as the signal uses dedicated routing, and not a clock buffer.
The Non-Global High Fan-Out Signals report lists the highest fan-out nodes not routed on global signals.
Reset and enable signals appear at the top of the list.
If there is routing congestion in the design, and there are high fan-out non-global nodes in the congested area, consider using global or regional signals to fan-out the nodes, or duplicate the high fan-out registers so that each of the duplicates can have fewer fan-outs.
Use the Chip Planner to locate high fan-out nodes, to report routing congestion, and to determine whether the alternatives are viable.