Visible to Intel only — GUID: dmi1442313831015
Ixiasoft
4.1. FIR II IP Core Interpolation Filters
4.2. FIR Decimation Filters
4.3. FIR II IP Time-Division Multiplexing
4.4. FIR II IP Core Multichannel Operation
4.5. FIR II IP Multiple Coefficient Banks
4.6. FIR II IP Coefficient Reloading
4.7. Reconfigurable FIR Filters
4.8. FIR II IP Core Interfaces and Signals
Visible to Intel only — GUID: dmi1442313831015
Ixiasoft
3.6. FIR II IP Core Reconfigurability
Parameter | Description |
---|---|
Reconfiguarable carrier | Turn on to implement a reconfigurable FIR filter. |
Number of modes | Enter the number of modes. |
Mode to edit | Select the mode to edit. |
Channel mode order | Edit the mapping. For example, for 0,1,2,3, the second element of mode 1 is 1, which means the IP core processes channel 1 on the second cycle, when you set the FIR to mode 1. |
Set mode | Click to set. |
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