2.2.1. Intel® Agilex™ 7 F-Series and I-Series EMIF Parameter Editor Guidelines
This topic provides high-level guidance for parameterizing the tabs in the Intel® Agilex™ 7 F-Series and I-Series EMIF IP parameter editor.
Parameter Editor Tab | Guidelines |
---|---|
General | Ensure that the following parameters are entered correctly:
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Memory |
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Mem I/O |
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FPGA I/O |
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Mem Timing |
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Controller | Set the controller parameters according to the desired configuration and behavior for your memory controller. |
Diagnostics | You can use the parameters on the Diagnostics tab to assist in testing and debugging your memory interface. |
Example Designs | The Example Designs tab lets you generate design examples for synthesis and for simulation. The generated design example is a complete EMIF system consisting of the EMIF IP and a driver that generates random traffic to validate the memory interface. |
For detailed information on individual parameters, refer to the appropriate chapter for your memory protocol in the External Memory Interfaces Intel® Agilex™ 7 F-Series and I-Series FPGA IP User Guide.