Early Power Estimator for Intel® Cyclone® 10 GX FPGAs User Guide

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ID 683150
Date 12/03/2021
Public
Document Table of Contents
Document Table of Contents x
1. Overview of the Early Power Estimator for Intel® Cyclone® 10 GX 2. Setting Up the Early Power Estimator for Intel® Cyclone® 10 GX 3. Early Power Estimator for Intel® Cyclone® 10 GX Graphical User Interface 4. Early Power Estimator Worksheets for Intel® Cyclone® 10 GX 5. Factors Affecting the Accuracy of the Early Power Estimator for Intel® Cyclone® 10 GX 6. Document Revision History for Early Power Estimator for Intel® Cyclone® 10 GX FPGAs User Guide A. Measuring Static Power
1. Overview of the Early Power Estimator for Intel® Cyclone® 10 GX x
1.1. Power Model Status
2. Setting Up the Early Power Estimator for Intel® Cyclone® 10 GX x
2.1. System Requirements 2.2. Download and Install the Early Power Estimator 2.3. Estimating Power Consumption
2.2. Download and Install the Early Power Estimator x
2.2.1. Changing the Macro Security Level in Microsoft Excel* 2003 2.2.2. Changing the Macro Security Level in Microsoft Excel* 2007 2.2.3. Changing the Macro Security Level in Microsoft Excel* 2010
2.3. Estimating Power Consumption x
2.3.1. Estimating Power Consumption Before Starting the FPGA Design 2.3.2. Estimating Power Consumption While Creating the FPGA Design 2.3.3. Estimating Power Consumption After Completing the FPGA Design
3. Early Power Estimator for Intel® Cyclone® 10 GX Graphical User Interface x
3.1. Early Power Estimator Input Fields 3.2. Early Power Estimator Output Fields 3.3. Early Power Estimator Input/Output Fields 3.4. Early Power Estimator Field Shading 3.5. Early Power Estimator Input Field Dependencies 3.6. Early Power Estimator Buttons
4. Early Power Estimator Worksheets for Intel® Cyclone® 10 GX x
4.1. Cyclone® 10 GX EPE - Common Worksheet Elements 4.2. Cyclone® 10 GX EPE - Main Worksheet 4.3. Cyclone® 10 GX EPE - Logic Worksheet 4.4. Cyclone® 10 GX EPE - RAM Worksheet 4.5. Cyclone® 10 GX EPE - DSP Worksheet 4.6. Cyclone® 10 GX EPE - Clock Worksheet 4.7. Cyclone® 10 GX EPE - PLL Worksheet 4.8. Cyclone® 10 GX EPE - I/O Worksheet 4.9. Cyclone® 10 GX EPE - I/O-IP Worksheet 4.10. Cyclone® 10 GX EPE - XCVR Worksheet 4.11. Cyclone® 10 GX EPE - Report Worksheet 4.12. Cyclone® 10 GX EPE - Enpirion Worksheet
5. Factors Affecting the Accuracy of the Early Power Estimator for Intel® Cyclone® 10 GX x
5.1. Toggle Rate 5.2. Airflow 5.3. Temperature 5.4. Heat Sink
1. Overview of the Early Power Estimator for Intel® Cyclone® 10 GX
2. Setting Up the Early Power Estimator for Intel® Cyclone® 10 GX
3. Early Power Estimator for Intel® Cyclone® 10 GX Graphical User Interface
4. Early Power Estimator Worksheets for Intel® Cyclone® 10 GX
5. Factors Affecting the Accuracy of the Early Power Estimator for Intel® Cyclone® 10 GX
6. Document Revision History for Early Power Estimator for Intel® Cyclone® 10 GX FPGAs User Guide
A. Measuring Static Power

4.7. Cyclone® 10 GX EPE - PLL Worksheet

Each row in the PLL worksheet of the Early Power Estimator (EPE) for Cyclone® 10 GX represents one or more PLLs in the device.

For Cyclone® 10 GX devices, the supported PLL types are IOPLL, fPLL, ATX PLL, and CMU PLL.

Figure 17. PLL Worksheet of the Early Power Estimator

Table 12.  PLL Worksheet Information
Column Heading Description
Module Specify a name for the PLL in this column. This is an optional value.
PLL Type Select whether the PLL is an IOPLL, fPLL, ATX PLL, or CMU PLL.
# PLL Blocks Enter the number of PLL blocks with the same combination of parameters.
# Counters Enter the number of counters of the PLL. For fPLL, this includes C counter, L counter, and feedback. This field is not applicable for ATX PLLs and CMU PLLs.
VCCR_GXB and VCCT_GXB Voltage Specify the voltage of the VCCR_GXB and VCCT_GXB rails. This field is not applicable for I/O PLLs.
Output Freq (MHz) Specify the output frequency for CMU and ATX PLLs.
VCO Freq (MHz) Specify the internal VCO operating frequency for fPLLs and I/O PLLs. When using an fPLL as a transmitter PLL for XCVR channels, the VCO frequency has to be such that the required fPLL output frequency can be achieved using a legal value of the counter used for HSSI clock output.
Total Power (W) Shows the total estimated power for this row (in W).
User Comments Enter any comments. This is an optional entry.

For more information about the PLLs available in Cyclone® 10 GX devices, refer to the Clock Networks and PLLs chapter of the Cyclone® 10 GX Device Handbook.

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