F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP Release Notes

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ID 683095
Date 4/01/2024
Public
Document Table of Contents
Document Table of Contents x
1. Release Notes
1. Release Notes x
1.1. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v13.0.0 1.2. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v12.0.0 1.3. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v11.0.0 1.4. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v10.0.0 1.5. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v8.0.0 1.6. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v7.0.0 1.7. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v6.0.0 1.8. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v5.0.0 1.9. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v4.0.0 1.10. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v3.0.0 1.11. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v2.0.0 1.12. F-Tile Ethernet Intel® FPGA Hard IP User Guide Archives 1.13. F-Tile Ethernet Intel® FPGA Hard IP Design Example User Guide Archives
1. Release Notes

1.7. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v6.0.0

Table 7.  v6.0.0 2022.06.20Support level keys: S = simulation, C = compilation, T = timing
Quartus® Prime Version Description Impact
22.2 Added B0 SCT support B0 Ordering Part Number (OPN) allows you to generate F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP design and also run Simulations, Compilations, and Timing Analysis (SCT).
Level Two Title