F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP Release Notes

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ID 683095
Date 7/08/2024
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Document Table of Contents
Document Table of Contents x
1. Release Notes
1. Release Notes x
1.1. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v14.0.0 1.2. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v13.0.0 1.3. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v12.0.0 1.4. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v11.0.0 1.5. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v10.0.0 1.6. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v8.0.0 1.7. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v7.0.0 1.8. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v6.0.0 1.9. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v5.0.0 1.10. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v4.0.0 1.11. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v3.0.0 1.12. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v2.0.0 1.13. F-Tile Ethernet Intel® FPGA Hard IP User Guide Archives 1.14. F-Tile Ethernet Intel® FPGA Hard IP Design Example User Guide Archives
1. Release Notes

1.7. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v7.0.0

Table 7.  v7.0.0 2022.09.26Support level keys: S = simulation, C = compilation, T = timing, H = Hardware
Quartus® Prime Version Description Impact
22.3 Added BO SCTH (Simulation, Compile, Timing, and Hardware) support.
Note: B0 FHT multi-lane designs support bonding by default, and non-bonded multi-lane designs are not supported.
B0 Ordering Part Number (OPN) now provide hardware support and also run Simulations, Compilations, and Timing Analysis (SCT).
IP migration to full rate Phase-Locked Loop (PLL) for both FHT and FGT transceivers. Force upgrade to current release.
Removed lt_cfg2 bits from register map: 0x344[7:0](restart_link_training_ln7:0). lt_cfg2 bits are no longer accessible.
Level Two Title