AN 425: Using the Command-Line Jam™ STAPL Solution for Device Programming

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ID 683089
Date 10/14/2024
Public
Document Table of Contents
Document Table of Contents x
1. Using the Command-Line Jam™ STAPL Solution for Device Programming
1. Using the Command-Line Jam™ STAPL Solution for Device Programming x
1.1. Jam™ STAPL Players 1.2. Jam™ STAPL Files 1.3. Using the Jam™ STAPL Player 1.4. Using the quartus_jli Command-Line Executable 1.5. Using Jam™ STAPL for ISP with an Embedded Processor 1.6. Board Layout 1.7. Embedded Jam™ STAPL Players 1.8. Updating Devices Using Jam 1.9. Document Revision History for AN 425: Using the Command-Line Jam™ STAPL Solution for Device Programming
1.1. Jam™ STAPL Players x
1.1.1. Differences Between the Jam™ STAPL Players and quartus_jli
1.2. Jam™ STAPL Files x
ASCII Text Files (.jam) Byte-Code Files 1.2.1. Generating Byte-Code Jam™ STAPL Files 1.2.2. List of Supported .jam and .jbc Actions and Procedures 1.2.3. Jam™ STAPL Player and quartus_jli Exit Codes
1.2.2. List of Supported .jam and .jbc Actions and Procedures x
1.2.2.1. Definitions of .jam and .jbc Action and Procedure Statements
1.4. Using the quartus_jli Command-Line Executable x
1.4.1. Command-line Syntax of quartus_jli Command-Line Executable
1.5. Using Jam™ STAPL for ISP with an Embedded Processor x
1.5.1. Methods to Connect the JTAG Chain to the Embedded Processor
1.5.1. Methods to Connect the JTAG Chain to the Embedded Processor x
1.5.1.1. Connecting the Embedded Processor Directly to the JTAG Chain 1.5.1.2. Connecting the JTAG Chain to an Existing Bus Using an Interface Device
1.6. Board Layout x
1.6.1. Treat the TCK Signal Trace as a Clock Tree 1.6.2. Use a Pull-Down Resistor on the TCK Signal 1.6.3. Make the JTAG Signal Traces as Short as Possible 1.6.4. Add External Resistors to Pull the Outputs to a Defined Logic Level
1.7. Embedded Jam™ STAPL Players x
1.7.1. The Jam™ STAPL Byte-Code Player 1.7.2. Steps to Port the Jam™ STAPL Byte-Code Player 1.7.3. Jam™ STAPL Byte-Code Player Memory Usage
1.7.2. Steps to Port the Jam™ STAPL Byte-Code Player x
1.7.2.1. Step 1: Set the Preprocessor Statements to Exclude Extraneous Code 1.7.2.2. Step 2: Map the JTAG Signals to the Hardware Pins 1.7.2.3. Step 3: Handle Text Messages from jbi_export() 1.7.2.4. Step 4: Customize Delay Calibration
1.7.3. Jam™ STAPL Byte-Code Player Memory Usage x
1.7.3.1. Estimating ROM Usage 1.7.3.2. Estimating Dynamic Memory Usage 1.7.3.3. Example of Calculating DRAM Required by Jam™ STAPL Byte-Code Player
1.7.3.1. Estimating ROM Usage x
1.7.3.1.1. Algorithm File Size Constants 1.7.3.1.2. Compressed and Uncompressed Data Size Constants 1.7.3.1.3. Jam™ STAPL Byte-Code Player Size
1.8. Updating Devices Using Jam x
1.8.1. jbi_execute Parameters 1.8.2. Running the Jam™ STAPL Byte-Code Player
1. Using the Command-Line Jam™ STAPL Solution for Device Programming

1.2. Jam™ STAPL Files

Altera supports two types of Jam™ STAPL files: .jam ASCII text files and .jbc byte-code files.

ASCII Text Files (.jam)

Altera supports the following formats of the ASCII text-based .jam:

  • JEDEC JESD71 STAPL format. Altera recommends that you use this format for new projects. In most cases, you use .jam files in tester environments.
  • Jam version 1.1 format (pre-JEDEC).

Byte-Code Files

The binary .jbc files are compiled versions of .jam files. A .jbc is compiled to a virtual processor architecture where the ASCII text-based Jam™ STAPL commands are mapped to byte-code instructions compatible with the virtual processor.

  • Jam™ STAPL
  • Byte-Code .jbc format—compiled version of the JEDEC JESD71 STAPL file. Altera recommends that you use this format in embedded application to minimize memory usage.
  • Jam™ Byte-Code .jbc format—compiled version of the Jam version 1.1 format file.

Section Content
Generating Byte-Code Jam STAPL Files
List of Supported .jam and .jbc Actions and Procedures
Jam STAPL Player and quartus_jli Exit Codes

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