Intel® FPGA Download Cable User Guide

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ID 683076
Date 8/22/2024
Public
Document Table of Contents
Document Table of Contents x
1. Introduction to Intel® FPGA Download Cable 2. Specifications for Intel® FPGA Download Cable 3. Using the Intel® FPGA Download Cable 4. Document Revision History for the Intel® FPGA Download Cable User Guide A. Additional Information
1. Introduction to Intel® FPGA Download Cable x
1.1. Intel® FPGA Download Cable Revision 1.2. Supported Devices and Host Systems
2. Specifications for Intel® FPGA Download Cable x
2.1. Block Diagram and Dimension 2.2. Cable-to-Board Connection 2.3. Pin Description 2.4. Operating Conditions 2.5. Power Requirements 2.6. RoHS Compliance
3. Using the Intel® FPGA Download Cable x
3.1. Installing the Intel® FPGA Download Cable Driver on Windows 3.2. Installing the Intel® FPGA Download Cable Driver on Linux 3.3. Setting up the Intel® FPGA Download Cable Hardware in the Quartus® Prime Software 3.4. Connecting the Intel® FPGA Download Cable to the Board
3.2. Installing the Intel® FPGA Download Cable Driver on Linux x
3.2.1. Installing on Red Hat Enterprise 4 or Earlier Versions 3.2.2. Installing on Red Hat Enterprise Linux 6 and Above, and Ubuntu Versions 18, 20, and 22
A. Additional Information x
A.1. Windows Troubleshooting Procedure for Intel® FPGA Download Cable A.2. Troubleshooting Procedure for Error when scanning hardware - No Devices
A.1. Windows Troubleshooting Procedure for Intel® FPGA Download Cable x
A.1.1. Jtagconfig version setting ( Quartus® Prime software root directory setting) A.1.2. Jtagserver Setting A.1.3. Install/Reinstall the Intel® FPGA Download Cable Driver
A.1.1. Jtagconfig version setting ( Quartus® Prime software root directory setting) x
A.1.1.1. Automatic Setting A.1.1.2. Manual Setting
1. Introduction to Intel® FPGA Download Cable
2. Specifications for Intel® FPGA Download Cable
3. Using the Intel® FPGA Download Cable
4. Document Revision History for the Intel® FPGA Download Cable User Guide
A. Additional Information

3.3. Setting up the Intel® FPGA Download Cable Hardware in the Quartus® Prime Software

  1. Launch the Quartus® Prime software.
  2. Click Tools > Programmer.
  3. Click Hardware Setup.
    Figure 4. Hardware Setup Dialog Box
    The Hardware Settings tab of the Hardware Setup dialog box is displayed.
  4. From the Currently selected hardware drop-down list, select USB-Blaster [USB-0].
  5. Click Close to close the Hardware Setup dialog box.
  6. In the Programmer window, select the desired programming mode from the Mode drop-down list.
    Table 10.  Programming Modes
    Mode Description
    Joint Test Action Group (JTAG) Programs or configures all supported Altera® devices except EPCS, EPCQ, and EPCQ-L devices.
    In-Socket Programming USB-Blaster does not support this programming mode.
    Passive Serial Configures all supported Altera® devices except EPCS, EPCQ, and EPCQ-L devices.
    Active Serial Programming Programs a single EPCS, EPCQ, or EPCQ-L device.
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