F-Tile Serial Lite IV Intel® FPGA IP User Guide

ID 683074
Date 10/02/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

4.2.3. RX CRC

You can enable the TX CRC block using the Enable CRC parameter in the IP Parameter Editor. This feature is supported in both Basic and Full modes.

The RX CRC block interfaces with the RX Control Word Removal and RX MII Decoder blocks. The IP asserts rx_crc_error signal when a CRC error occurs.

The IP deasserts the rx_crc_error at every new burst. It is an output to the user logic for user logic error handling.