P-tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example User Guide

ID 683038
Date 9/26/2022
Public

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2.3.1.1. Test Driver Module

The test driver module, intel_pcie_ptile_tbed_hwtcl.v, instantiates the top-level BFM,altpcietb_bfm_top_rp.v.

The top-level BFM completes the following tasks:

  1. Instantiates the driver and monitor.
  2. Instantiates the Root Port BFM.
  3. Instantiates the serial interface.

The configuration module, altpcietb_g3bfm_configure.v, performs the following tasks:

  1. Configures and assigns the BARs.
  2. Configures the Root Port and Endpoint.
  3. Displays comprehensive Configuration Space, BAR, MSI, MSI-X, and AER settings.