Developer Guide and Reference

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ID 767253
Date 10/31/2024
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Document Table of Contents
Document Table of Contents x
Developer Guide and Reference
Developer Guide and Reference x
Intel® oneAPI DPC++/C++ Compiler Introduction Compiler Setup Compiler Reference Compilation Optimization and Programming Compatibility and Portability Notices and Disclaimers
Intel® oneAPI DPC++/C++ Compiler Introduction x
Get Help and Support Related Information
Compiler Setup x
Use the Command Line Use Eclipse Use Microsoft Visual Studio
Use the Command Line x
Specify Component Locations Invoke the Compiler Use the Command Line on Windows File Extensions Use Makefiles for Compilation Use CMake with the Compiler Use Compiler Options Specify Compiler Files Convert Projects to Use a Selected Compiler
Use Eclipse x
Add the Compiler to Eclipse Multiversion Compiler Support Use Cheat Sheets Create a Simple Eclipse Project Makefiles Use Intel Libraries with Eclipse
Use Microsoft Visual Studio x
Create a New Project Use the Intel® oneAPI DPC++/C++ Compiler Select the Compiler Version Specify a Base Platform Toolset Use Property Pages Use Intel® Libraries with Microsoft Visual Studio* Include MPI Support Use Code Coverage in Microsoft Visual Studio* Use Profile Guided Optimization in Microsoft Visual Studio* Optimization Reports in Microsoft Visual Studio* Dialog Box Help
Dialog Box Help x
Use Intel® oneAPI DPC++/C++ Compiler dialog box Hardware Profile-Guided Optimization dialog box Options: Compilers dialog box Options: Intel Libraries for oneAPI dialog box Options: Converter dialog box Options: Optimization Reports dialog box Options: Profile Guided Optimization dialog box Profile Guided Optimization dialog box Options: Code Coverage dialog box Code Coverage dialog box Code Coverage Settings dialog box
Compiler Reference x
C/C++/SYCL Calling Conventions Compiler Options Floating-Point Operations Attributes Intrinsics Libraries Macros Pragmas Syntactic and Semantic Errors
Compiler Options x
Alphabetical Option List General Rules for Compiler Options What Appears in the Compiler Option Descriptions Optimization Options Advanced Optimization Options Code Generation Options Offload Compilation, OpenMP*, and Parallel Processing Options Interprocedural Optimization Options Profile Guided Optimization Options Optimization Report Options Floating-Point Options Inlining Options Output, Debug, and Precompiled Header Options Preprocessor Options Component Control Options Language Options Data Options Compiler Diagnostic Options Compatibility Options Linking or Linker Options Miscellaneous Options Deprecated and Removed Compiler Options Display Option Information Alternate Compiler Options Portability and GCC-Compatible Warning Options
Optimization Options x
fast fbuiltin, Oi foptimize-sibling-calls GF nolib-inline O Od Ofast Os Ot Ox
Advanced Optimization Options x
ffreestanding, Qfreestanding fjump-tables fvec-allow-scalar-stores, Qvec-allow-scalar-stores fvec-peel-loops, Qvec-peel-loops fvec-remainder-loops, Qvec-remainder-loops fvec-with-mask, Qvec-with-mask ipp-link, Qipp-link mno-gather, Qgather- mno-scatter, Qscatter- qactypes, Qactypes qdaal, Qdaal qipp, Qipp qmkl, Qmkl qmkl-ilp64, Qmkl-ilp64 qmkl-sycl-impl, Qmkl-sycl-impl qopt-assume-no-loop-carried-dep, Qopt-assume-no-loop-carried-dep qopt-dword-index-for-array-of-structs, Qopt-dword-index-for-array-of-structs qopt-dynamic-align, Qopt-dynamic-align qopt-for-throughput, Qopt-for-throughput qopt-mem-layout-trans, Qopt-mem-layout-trans qopt-multiple-gather-scatter-by-shuffles, Qopt-multiple-gather-scatter-by-shuffles qopt-prefetch, Qopt-prefetch qopt-prefetch-distance, Qopt-prefetch-distance qopt-prefetch-loads-only, Qopt-prefetch-loads-only qopt-streaming-stores, Qopt-streaming-stores qopt-zmm-usage, Qopt-zmm-usage qtbb, Qtbb unroll, Qunroll vec, Qvec vec-threshold, Qvec-threshold vecabi, Qvecabi
Code Generation Options x
arch ax, Qax EH fasynchronous-unwind-tables fcf-protection, Qcf-protection fdata-sections, Gw fexceptions ffunction-sections, Gy fomit-frame-pointer Gd GR guard Gv m, Qm m64, Qm64 m80387 march masm mauto-arch, Qauto-arch mbranches-within-32B-boundaries, Qbranches-within-32B-boundaries mintrinsic-promote, Qintrinsic-promote momit-leaf-frame-pointer mtune, tune regcall, Qregcall x, Qx xHost, QxHost
Offload Compilation, OpenMP*, and Parallel Processing Options x
device-math-lib fintelfpga fiopenmp, Qiopenmp flink-huge-device-code fno-sycl-libspirv fopenmp fopenmp-concurrent-host-device-compile, Qopenmp-concurrent-host-device-compile fopenmp-declare-target-scalar-defaultmap, Qopenmp-declare-target-scalar-defaultmap fopenmp-device-code-split, Qopenmp-device-code-split fopenmp-device-lib fopenmp-device-link, Qopenmp-device-link fopenmp-max-parallel-link-jobs, Qopenmp-max-parallel-link-jobs fopenmp-offload-mandatory, Qopenmp-offload-mandatory fopenmp-target-buffers, Qopenmp-target-buffers fopenmp-target-default-sub-group-size, Qopenmp-target-default-sub-group-size fopenmp-target-loopopt, Qopenmp-target-loopopt fopenmp-target-simd, Qopenmp-target-simd fopenmp-targets, Qopenmp-targets fsycl fsycl-add-default-spec-consts-image fsycl-allow-device-dependencies fsycl-dead-args-optimization fsycl-device-code-split fsycl-device-lib fsycl-device-obj fsycl-device-only fsycl-early-optimizations fsycl-enable-function-pointers fsycl-esimd-force-stateless-mem fsycl-explicit-simd fsycl-force-target fsycl-fp64-conv-emu fsycl-help fsycl-host-compiler fsycl-host-compiler-options fsycl-id-queries-fit-in-int fsycl-instrument-device-code fsycl-link fsycl-max-parallel-link-jobs fsycl-optimize-non-user-code fsycl-pstl-offload fsycl-rdc fsycl-remove-unused-external-funcs fsycl-targets fsycl-unnamed-lambda fsycl-use-bitcode ftarget-compile-fast ftarget-export-symbols ftarget-register-alloc-mode, Qtarget-register-alloc-mode nolibsycl qopenmp, Qopenmp qopenmp-link qopenmp-simd, Qopenmp-simd qopenmp-stubs, Qopenmp-stubs reuse-exe Wno-sycl-strict Xopenmp-target Xs Xsycl-target
Interprocedural Optimization Options x
flto ipo, Qipo
Profile Guided Optimization Options x
fprofile-dwo-dir fprofile-ml-use fprofile-sample-generate fprofile-sample-use
Optimization Report Options x
qopt-report, Qopt-report qopt-report-file, Qopt-report-file qopt-report-names, Qopt-report-names qopt-report-phase, Qopt-report-phase qopt-report-stdout, Qopt-report-stdout
Floating-Point Options x
ffp-accuracy, Qfp-accuracy ffp-contract fimf-absolute-error, Qimf-absolute-error fimf-accuracy-bits, Qimf-accuracy-bits fimf-arch-consistency, Qimf-arch-consistency fimf-domain-exclusion, Qimf-domain-exclusion fimf-max-error, Qimf-max-error fimf-precision, Qimf-precision fimf-use-svml, Qimf-use-svml fma, Qfma fp-model, fp fp-speculation, Qfp-speculation ftz, Qftz pc, Qpc
Inlining Options x
fgnu89-inline finline finline-functions inline-forceinline, Qinline-forceinline
Output, Debug, and Precompiled Header Options x
c debug (Linux*) debug (Windows*) Fa fasm-blocks Fe Fo Fp fsystem-debug fverbose-asm g gdwarf grecord-gcc-switches gsplit-dwarf o S use-msasm Y- Yc Yu Zi, Z7, ZI
Preprocessor Options x
B C D dD, QdD dM, QdM E EP FI H, QH I idirafter imacros iprefix iquote isystem iwithprefix iwithprefixbefore M, QM MD, QMD MF, QMF MG, QMG MM, QMM MMD, QMMD MQ, QMQ MT, QMT nostdinc++ P TP U undef X
Component Control Options x
Qoption
Language Options x
ansi fno-gnu-keywords fno-operator-names fno-rtti fpermissive fshort-enums fsyntax-only, Zs funsigned-char, J std, Qstd strict-ansi vd vmg x (type option) Zc Zg Zp
Data Options x
fcommon fkeep-static-consts, Qkeep-static-consts fmaintain-32-byte-stack-align, Qmaintain-32-byte-stack-align fmath-errno fpack-struct fpic fpie fstack-protector fstack-security-check fvisibility fzero-initialized-in-bss, Qzero-initialized-in-bss GA Gs GS mcmodel Qlong-double
Compiler Diagnostic Options x
w W Wabi Wall Wcheck-unicode-security Wcomment Wdeprecated Werror, WX Werror-all Wextra-tokens Wformat Wformat-security Wmain Wmissing-declarations Wmissing-prototypes Wpointer-arith Wreorder Wreturn-type Wshadow Wsign-compare Wstrict-aliasing Wstrict-prototypes Wtrigraphs Wuninitialized Wunknown-pragmas Wunused-function Wunused-variable Wwrite-strings
Compatibility Options x
gcc-toolchain vmv
Linking or Linker Options x
F (Windows*) fixed fortlib fuse-ld l L LD link MD MT nodefaultlibs no-intel-lib, Qno-intel-lib nostartfiles nostdlib pie pthread shared shared-intel shared-libgcc static static-intel static-libgcc static-libstdc++ T u (Linux*) v Wa Wl Wp Xlinker Zl
Miscellaneous Options x
dryrun dumpmachine dumpversion fpreview-breaking-changes help MP nologo save-temps, Qsave-temps showIncludes sox sysroot Tc TC Tp version
Floating-Point Operations x
Programming Tradeoffs in Floating-Point Applications Floating-Point Optimizations Denormal Numbers Floating-Point Environment Set the FTZ and DAZ Flags Tuning Performance IEEE Floating-Point Operations
Attributes x
align align_value allow_cpu_features code_align const cpu_dispatch, cpu_specific target
Libraries x
Create Libraries Use Intel Shared Libraries Manage Libraries Redistribute Libraries When Deploying Applications Resolve References to Shared Libraries Redistributable Library Considerations Intel's Memory Allocator Library SIMD Data Layout Templates Intel® C++ Class Libraries Intel's C++ Asynchronous I/O Extensions for Windows IEEE 754-2008 Binary Floating-Point Conformance Library Intel's Numeric String Conversion Library
SIMD Data Layout Templates x
Function Calls and Containers User-Level Interface Examples
Function Calls and Containers x
Construct an n_container Bounds
User-Level Interface x
SDLT Primitives soa1d_container aos1d_container n_container Bounds Accessors Proxy Objects Number Representation Indexes Convenience and Correctness
aos1d_container x
access_by
n_container x
Layouts Shape make_ n_container template function extent_d template function
Shape x
n_extent_generator
Bounds x
bounds_t sdlt::bounds Template Function n_bounds_t n_bounds_generator bounds_d Template Function
Accessors x
soa1d_container::accessor and aos1d_container::accessor soa1d_container::const_accessor and aos1d_container::const_accessor Accessor Concept
Proxy Objects x
Proxy ConstProxy
Number Representation x
aligned_offset fixed_offset
Indexes x
linear_index n_index_t n_index_generator index_d template function
Convenience and Correctness x
max_val min_val
Examples x
Efficiency with Structure of Arrays Example Complex SDLT Primitive Construction Example Forward Dependency Example Use of Offsets and Methods on a SDLT Primitive Example RGB to YUV Conversion Example
Intel® C++ Class Libraries x
C++ Classes and SIMD Operations Capabilities of C++ SIMD Classes Integer Vector Classes Floating-Point Vector Classes Classes Quick Reference Programming Example Intel's valarray Implementation
Integer Vector Classes x
Terms and Syntax Rules for Operators Assignment Operator Logical Operators Addition and Subtraction Operators Multiplication Operators Shift Operators Comparison Operators Conditional Select Operators Debug Operations Unpack Operators Pack Operators Clear MMX™ State Operator Integer Functions for Intel® Streaming SIMD Extensions Conversions between Fvec and Ivec
Floating-Point Vector Classes x
Fvec Syntax and Notation Data Alignment Conversions Constructors and Initialization Arithmetic Operators Minimum and Maximum Operators Logical Operators Compare Operators Conditional Select Operators for Fvec Classes Cacheability Support Operators Debug Operations Load and Store Operators Unpack Operators Move Mask Operators
Intel's C++ Asynchronous I/O Extensions for Windows x
Intel's C++ Asynchronous I/O Library for Windows Intel's C++ Asynchronous I/O Class for Windows
Intel's C++ Asynchronous I/O Library for Windows x
aio_read aio_write Example for aio_read and aio_write Functions aio_suspend Example for aio_suspend Function aio_error aio_return Example for aio_error and aio_return Functions aio_fsync aio_cancel Example for aio_cancel Function lio_listio Example for lio_listio Function Asynchronous I/O Function Errors
Intel's C++ Asynchronous I/O Class for Windows x
Template Class async_class get_last_operation_id wait get_status get_last_error get_error_operation_id stop_queue resume_queue clear_queue Example for Using async_class Template Class
IEEE 754-2008 Binary Floating-Point Conformance Library x
Intel® IEEE 754-2008 Binary Floating-Point Conformance Library and Usage Function List Homogeneous General-Computational Operations Functions General-Computational Operation Functions Quiet-Computational Operations Functions Signaling-Computational Operations Functions Non-Computational Operations Functions
Intel's Numeric String Conversion Library x
Use Intel's Numeric String Conversion Library Function List
Macros x
ISO Standard Predefined Macros Additional Predefined Macros Use Predefined Macros to Specify Intel® Compilers
Pragmas x
Intel-Specific Pragma Reference Supported OpenMP* Pragmas Pragmas Compatible with Other Compilers
Intel-Specific Pragma Reference x
block_loop/noblock_loop distribute_point inline, noinline, forceinline ivdep loop_count nofusion novector omp target variant dispatch ompx prefetch data prefetch/noprefetch unroll/nounroll unroll_and_jam/nounroll_and_jam vector
Compilation x
Compilation Overview Supported Environment Variables Pass Options to the Linker Specify Alternate Tools Use Configuration Files Use Response Files Global Symbols and Visibility Attributes for Linux* Save Compiler Information in Your Executable Link Debug Information Ahead of Time Compilation Device Offload Compilation Considerations Use a Third-Party Compiler as a Host Compiler for SYCL Code
Optimization and Programming x
OpenMP* Support SYCL* Support Compiler Sanitizers Intel® oneAPI Level Zero Vectorization Instrumented Profile-Guided Optimization Hardware Profile-Guided Optimization High-Level Optimization Interprocedural Optimization Methods to Optimize Code Size Optimization Reports Compiler Math Library SYCL* Device Library
OpenMP* Support x
Add OpenMP* Support Parallel Processing Model Worksharing Using OpenMP* Control Thread Allocation OpenMP* Library Support OpenMP* Contexts OpenMP* Offloading SPMD/SIMT and SIMD Models OpenMP* Advanced Issues OpenMP* Implementation-Defined Behaviors OpenMP* Examples
OpenMP* Library Support x
OpenMP* Runtime Library Routines Intel® Compiler Extension Routines to OpenMP* OpenMP* Support Libraries Use the OpenMP* Libraries Thread Affinity Interface OpenMP* Memory Spaces and Allocators
OpenMP* Contexts x
OpenMP* Context Selectors Score and Match Context Selectors
SYCL* Support x
SYCL* Extensions Redistribute Your SYCL* Application CUDA* to SYCL* Migration
Intel® oneAPI Level Zero x
Intel® oneAPI Level Zero Switch Intel® oneAPI Level Zero Backend Specification Programming with the Intel® oneAPI Level Zero Backend
Vectorization x
Automatic Vectorization Explicit Vector Programming
Automatic Vectorization x
Vectorization Programming Guidelines Use Automatic Vectorization Vectorization and Loops Loop Constructs
Explicit Vector Programming x
User-Mandated or SIMD Vectorization SIMD-Enabled Functions SIMD-Enabled Function Pointers Function Annotations and the SIMD Directive for Vectorization Explicit SIMD SYCL Extension
Interprocedural Optimization x
Use Interprocedural Optimization Performance Considerations Create a Library from IPO Objects Inline Expansion of Functions
Compiler Math Library x
Use the Compiler Math Library Math Function List Trigonometric Functions Hyperbolic Functions Exponential Functions Special Functions Nearest Integer Functions Remainder Functions Miscellaneous Functions Complex Functions C99 Macros
SYCL* Device Library x
Basic Arithmetic Operations and Simple Math Functions IMF Transcendental Math Functions
Basic Arithmetic Operations and Simple Math Functions x
Simple Integer Math Functions Basic Integer Arithmetic Operations Simple Arithmetic Operations with Rounding Mode Type Casting Functions for Floating-Point Numbers Type Casting Functions for Half-Precision Types Type Casting Functions for bfloat16 Type Simple Half-Precision Arithmetic Math Functions Half-Precision Comparison Functions
IMF Transcendental Math Functions x
IMF Device Library Usage Example IMF Device Library Function List IMF Device Library Trigonometric Functions IMF Device Library Hyperbolic Functions IMF Device Library Exponential Functions IMF Device Library Logarithmic Functions IMF Device Library Power Functions IMF Device Library Special Functions IMF Device Library Rounding Functions IMF Device Library Miscellaneous Functions
Compatibility and Portability x
Standards Conformance GCC Compatibility and Interoperability Microsoft Compatibility Port from Microsoft Visual C++* to the Intel® oneAPI DPC++/C++ Compiler Port from GCC* to the Intel® oneAPI DPC++/C++ Compiler
Port from Microsoft Visual C++* to the Intel® oneAPI DPC++/C++ Compiler x
Modify Your makefile Other Considerations
Port from GCC* to the Intel® oneAPI DPC++/C++ Compiler x
Modify Your makefile Other Considerations
Developer Guide and Reference

Offload Compilation, OpenMP*, and Parallel Processing Options

This section contains descriptions for compiler options that pertain to offload compilation, OpenMP*, or parallel processing. They are listed in alphabetical order.

Parent topic: Compiler Options
  • device-math-lib
    Enables or disables certain device libraries.
  • fintelfpga
    Lets you perform ahead-of-time (AOT) compilation for the Field Programmable Gate Array (FPGA).
  • fiopenmp, Qiopenmp
    Enables recognition of OpenMP* features, such as parallel, simd, and offloading directives, and tells the parallelizer to generate multi-threaded code based on OpenMP* directives. This is an alternate name for compiler option -qopenmp (and /Qopenmp).
  • flink-huge-device-code
    Tells the compiler to place device code later in the linked binary. This is to prevent 32-bit PC-relative relocations between surrounding Executable and Linkable Format (ELF) sections when the device code is larger than 2GB.
  • fno-sycl-libspirv
    Disables the check for libspirv (the SPIR-V* tools library).
  • fopenmp
    Enables recognition of OpenMP* features and tells the parallelizer to generate multi-threaded code based on OpenMP* directives. This option leads to lowering of OpenMP constructs in the compiler front-end (as it is implemented by the LLVM community) and is expected to be not as performant as using the option -fiopenmp, which enables the Intel implementation of OpenMP constructs where the lowering is done in the compiler backend. Also, this option does not support offloading to GPUs.
  • fopenmp-concurrent-host-device-compile, Qopenmp-concurrent-host-device-compile
    Enables parallel compilation of host and target compilation steps when performing OpenMP offload compilations. This is an experimental feature.
  • fopenmp-declare-target-scalar-defaultmap, Qopenmp-declare-target-scalar-defaultmap
    Determines which implicit data-mapping/sharing rules are applied for a scalar variable referenced in a target pragma.
  • fopenmp-device-code-split, Qopenmp-device-code-split
    Enables parallel compilation of SPIR-V* kernels for OpenMP offload Ahead-Of-Time compilation.
  • fopenmp-device-lib
    Enables or disables certain device libraries for an OpenMP* target.
  • fopenmp-device-link, Qopenmp-device-link
    Determines whether the compiler performs a device link during the compilation step instead of a link step. When enabled for OpenMP offload compilations, it produces file device binaries within the generated fat object.
  • fopenmp-max-parallel-link-jobs, Qopenmp-max-parallel-link-jobs
    Determines the maximum number of parallel actions to be performed during device linking steps, where applicable.
  • fopenmp-offload-mandatory, Qopenmp-offload-mandatory
    Instructs the compiler to only generate a device version of OpenMP* target regions.
  • fopenmp-target-buffers, Qopenmp-target-buffers
    Enables a way to overcome the problem where some OpenMP* offload SPIR-V* devices produce incorrect code when a target object is larger than 4GB.
  • fopenmp-target-default-sub-group-size, Qopenmp-target-default-sub-group-size
    Lets you specify a default sub-group size globally for single program multiple data (SPMD) kernels that are generated for OpenMP* target constructs when offloading to SPIR64-based devices.
  • fopenmp-target-loopopt, Qopenmp-target-loopopt
    Enables the loop optimizer and auto-vectorization for OpenMP* offloading device compilation when option O2 or higher is set or specified.
  • fopenmp-target-simd, Qopenmp-target-simd
    Enables OpenMP* SIMD loop vectorization for OpenMP offloading device compilation when option level O2 or higher is set or specified.
  • fopenmp-targets, Qopenmp-targets
    Enables offloading to a specified GPU target if OpenMP* features have been enabled.
  • fsycl
    Enables a program to be compiled as a SYCL program rather than as plain C++11 program.
  • fsycl-add-default-spec-consts-image
    Enables or disables generation of a copy of every device image that uses a specialization constant, and replaces all instances of that specialization constant with default values defined in the relevant specialization_id variable.
  • fsycl-allow-device-dependencies
    Determines whether dependencies are allowed between device images when splitting device code.
  • fsycl-dead-args-optimization
    Enables elimination of SYCL dead kernel arguments.
  • fsycl-device-code-split
    Specifies a SYCL* device code module assembly.
  • fsycl-device-lib
    Enables or disables certain device libraries for a SYCL* target.
  • fsycl-device-obj
    Lets you specify the format of device code stored in a resulting object. This is an experimental feature.
  • fsycl-device-only
    Tells the compiler to generate a device-only binary.
  • fsycl-early-optimizations
    Enables LLVM-related optimizations before SPIR-V* generation.
  • fsycl-enable-function-pointers
    Enables function pointers and support for virtual functions for SYCL kernels and device functions. This is an experimental feature.
  • fsycl-esimd-force-stateless-mem
    Determines whether the compiler enforces stateless memory accesses within ESIMD kernels on the target device. This is an experimental feature.
  • fsycl-explicit-simd
    Enables or disables the experimental "Explicit SIMD" SYCL* extension. This is a deprecated option that may be removed in a future release.
  • fsycl-force-target
    Forces the compiler to use the specified target triple device when extracting device code from any given objects on the command line.
  • fsycl-fp64-conv-emu
    Tells the compiler to use fp64 partial emulation for kernels with only fp64 conversion operations and no fp64 computation operations. It requires an Intel GPU that supports fp64 partial emulation.
  • fsycl-help
    Causes help information to be emitted from the device compiler backend.
  • fsycl-host-compiler
    Tells the compiler to use the specified compiler for the host compilation of the overall offloading compilation that is performed.
  • fsycl-host-compiler-options
    Passes options to the compiler specified by option fsycl-host-compiler.
  • fsycl-id-queries-fit-in-int
    Tells the compiler to assume that SYCL ID queries fit within MAX_INT.
  • fsycl-instrument-device-code
    Enables or disables linking of the Instrumentation and Tracing Technology (ITT) device libraries for VTune™.
  • fsycl-link
    Tells the compiler to perform a partial link of device binaries to be used with Field Programmable Gate Array (FPGA).
  • fsycl-max-parallel-link-jobs
    Tells the compiler that it can simultaneously spawn up to the specified number of processes to perform actions required to link SYCL applications. This is an experimental feature.
  • fsycl-optimize-non-user-code
    Tells the compiler to optimize SYCL framework utility functions and to leave the kernel code unoptimized for further debugging.
  • fsycl-pstl-offload
    Enables the automatic offloading of C++ standard parallel algorithms to a SYCL device.
  • fsycl-rdc
    Determines whether the compiler generates relocatable device code during SYCL* offload target compilation.
  • fsycl-remove-unused-external-funcs
    Determines whether unused SYCL_EXTERNAL functions are removed during compilation of SYCL device code.
  • fsycl-targets
    Tells the compiler to generate code for specified device targets.
  • fsycl-unnamed-lambda
    Enables unnamed SYCL* lambda kernels.
  • fsycl-use-bitcode
    Tells the compiler to produce device code in LLVM Intermediate Representation (IR) bitcode format into fat objects.
  • ftarget-compile-fast
    Tells the compiler to perform less aggressive optimizations to reduce compilation time at the expense of generating less optimal target code. This is an experimental feature.
  • ftarget-export-symbols
    Exposes exported symbols in a generated target library to allow for visibility to other modules.
  • ftarget-register-alloc-mode, Qtarget-register-alloc-mode
    Specifies a register allocation mode for specific hardware for use by supported target backends.
  • nolibsycl
    Disables linking of the SYCL* runtime library.
  • qopenmp, Qopenmp
    Enables recognition of OpenMP* features, such as parallel, simd, and offloading directives, and tells the parallelizer to generate multi-threaded code based on OpenMP* directives. This is an alternate name for compiler option -fiopenmp (and /Qiopenmp).
  • qopenmp-link
    Controls whether the compiler links to static or dynamic OpenMP* runtime libraries.
  • qopenmp-simd, Qopenmp-simd
    Enables or disables OpenMP* SIMD compilation.
  • qopenmp-stubs, Qopenmp-stubs
    Enables compilation of OpenMP* programs in sequential mode.
  • reuse-exe
    Tells the compiler to speed up Field Programmable Gate Array (FPGA) target compile time by reusing a previously compiled FPGA hardware image.
  • Wno-sycl-strict
    Disables warnings that enforce strict SYCL* language compatibility.
  • Xopenmp-target
    Enables options to be passed to the specified tool in the device compilation tool chain for the OpenMP* target.
  • Xs
    Passes options to the backend tool.
  • Xsycl-target
    Enables options to be passed to the specified tool in the device compilation tool chain for the SYCL* target.
Level Two Title