Agilex™ 7 Software Development Guided Journey

This interactive Agilex™ 7 Software Development journey provides step-by-step guidance to develop software for embedded designs targeting the Arm®-based Host Processor System (HPS), soft Nios® V Processor or host attach systems connected through FPGA interfaces such as PCIe or CXL. By the end of this journey, you should be able to implement, debug and deploy a complete software solution. Select the software design process below and choose the desired software design step on the left navigation to find the available resources.

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Before you Begin Learn About HPS Design Review Key Documents Define Software Architecture Define Embedded IP and Interfaces Define Booting and Configuration Select OS and Software Tools Define Remote Update, Debug, and Software Security Get Started with HPS Exercise Golden System Reference Designs Get Software Tools Configure Device and Boot HPS Port Operating System and Develop Device Drivers Port the Operating System Develop Drivers for Custom IP and Peripheral Devices Perform Software Development Develop the Software Application Implement Embedded Software Security Implement Remote Update and Debug Implement Remote System Update Implement Remote FPGA Debug
Before you Begin Review Key Documents Take Online Training Install and Evaluate Select a Processor Variant Get Development Tools and Licenses Evaluate Example Designs Select Software Stack Ingredients Select Operating System and Boot Loader Include Drivers and Middleware Develop Processor System on Altera® FPGA Develop Processor System on Altera® FPGA Develop Software Application Develop Software Application Debug and Verify Simulate Processor System Debug Processor System
Discover and Select Host Software Offerings Review Key Documents Take Training Courses Select Hardware Ingredients Select Software Ingredients Evaluate Get Started Perform Evaluation Develop Stack Set Up Development Environment Develop Drivers Develop Software Application Virtualize Software Stack Next Steps Begin Developing your FPGA Application Begin Developing your PCIe and CXL Interfaces

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