Agilex™ 7 FPGA Interface Protocol Design Journey

The interactive FPGA Interface Design Journey provides a curated list of documentation to help you successfully design a logic interface with associated software drivers to connect your user logic application to components on your board such as memory, flash devices, ethernet, host server to FPGA interfaces (i.e., PCIe or CXL), embedded peripherals via I2C, SPI, UART, USB etc. as well as video, wireless and wireline communication interfaces. The FPGA interface design provides a layer of abstraction between the user logic application and the details of the board enabling portability, design reuse and high-level design flows. Select the interface below and choose the desired design step on the left navigation to find the available resources.

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Design with IO Design with GPIO and LVDS IO Design with PHY Lite IP Discover Transceiver Tiles Select Transceiver Tile Design with Transceiver Tiles Design with E-Tile Design with F-Tile Design with P-Tile Design with R-Tile
Please select the desired journey step from the flowchart to the left to view the applicable assets.