Quartus® II Classic Timing Analyzer Resource Center

The Quartus® II software includes the classic timing analyzer that combines powerful features with ease-of-use.

Classic Timing Analyzer Documentation

Topic

Description

AN 411: Understanding PLL Timing for Stratix® II Devices

This application note describes how to analyze and constrain phase-locked loops (PLLs) using the classic timing analyzer.

Performing Equivalent timing Analysis Between Intel FPGA Classic Timing Analyzer and Xilinx Trace white paper

This white paper shows how to perform equivalent static timing analysis between Intel FPGA classic timing analyzer and Xilinx's Trace.
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