ID:13404 Verilog HDL error at <location>: "<name>" is not a task or void function

CAUSE: In a statement at the specified location in a Verilog Design File (.v), you attempted to enable a task with the specified name. However, the name refers to an object that is not a task or, in SystemVerilog, a void function.

ACTION: Modify the task enable statement to refer to a task or void function. If you are attempting to call a function with a non-void return type, the function call must be in an expression.