ID:13452 Verilog HDL Module Instantiation error at <location>: <text> "<text>" has no parameter named "<text>"

CAUSE: In a Module Instantiation at the specified location in a Verilog Design File (.v), you used a named parameter assignment list to assign values to the instantiated module's parameters. However, you attempted to assign a value to a parameter that is not declared as a parameter in the Module Declaration.

ACTION: Make sure you spelled the parameter name correctly, remove the parameter from the named parameter assignment list, or add the parameter to the Module Declaration's module parameter port list.