TMC-20220: RAM Blocks with Restricted Fmax below Required Fmax

Description

Violations of this rule identify RAM Blocks with restricted Fmax that prevents the circuit from meeting the required Fmax performance. This violation can occur when the required Fmax exceeds a RAM block's Fmax limit.

Parameters

Name	Description	Type	Default Value	Min Value	Max Value
maximum_pulse_width_slack	Reports a violation for timing endpoints that have a minimum-pulse-width slack below the value of this parameter.	double	0.0

Recommendation

Relax the clock constraint(s) of the RAM block to meet the block specification. Refer to:

Memory Block Performance Specifications for Intel Stratix 10 Devices in the Intel Stratix 10 Device Data Sheet.
Memory Block Performance Specifications for Intel Agilex Devices in the Intel^®Agilex™

Also refer to Memory in the Intel Hyperflex Architecture High-Performance Design Handbook for various optimization techniques for hard memory blocks in Intel Hyperflex architecture FPGAs.

Severity

Medium

Tag	Description
ram	Design rule checks related to M20k blocks inside the FPGA fabric.
minimum-pulse-width	Design rule checks related to minimum pulse width.

Device Family