CDC-50101: Intra-Clock False Path Synchronizer
Description
Violations of this rule identify a synchronizer chain that follows an intra-clock false path. To preserve the original behaviour of IP, the Intel Quartus Prime software conservatively treats intra-clock false paths as asynchronous, despite them not involving a clock crossing at all.
Recommendation
If an intra-clock false path is required and is not meant to be asynchronous, use set_false_path -no_synchronizer to cut the path, instead of set_false_path .
Severity
Low
Tags
Tag | Description |
---|---|
synchronizer | Design rule checks related to synchronizer chains. |
false-positive-synchronizer | Design rule checks related to automatically-deteected synchronizer chains that may have been over-zealously detected. |
Device Family
- Intel®Cyclone® 10 GX
- Intel®Arria® 10
- Intel®Stratix® 10
- Intel®Agilex™