CvP Settings Page (Device and Pin Options Dialog Box)

Specifies the configuration mode for Configuration via Protocol (CvP). In Core initialization mode, the periphery image is stores in an external configuration device and is loads into the FPGA through a conventional configuration scheme. The core image is stores in a host memory and is loads into the FPGA through the PCIe link. In core initialization mode, the FPGA device initializes after initial system power up by loading the full configuration image from the external local configuration device to the FPGA. Use the PCIe link to perform one or more FPGA core image updates through this mode.