Performing a Gate-Level Functional Simulation with the ModelSim® - Intel® FPGA Edition Software
You can use the Mentor Graphics® ModelSim® - Intel® FPGA Edition software, provided with the Intel® Quartus® Prime software, to perform a gate-level functional simulation of a VHDL or Verilog HDL design that contains Intel-specific components with the ModelSim® - Intel® FPGA Edition interface, or with command-line commands.
Note: Do not compile any of the
simulation model files in the /eda/sim_lib directory. Simulation
libraries for ModelSim® - Intel® FPGA Edition are
precompiled.
To continue with the ModelSim® - Intel® FPGA Edition simulation flow, perform a timing simulation with the ModelSim® - Intel® FPGA Edition software.