ramstyle VHDL Synthesis Attribute
A VHDL synthesis attribute that controls the way an inferred RAM is implemented.
syn_ramstyle
. This synthesis attribute behaves identically to the
ramstyle
synthesis attribute.
To use the ramstyle
synthesis attribute, first declare the synthesis attribute with a string
type using an Attribute
Declaration. Then use an Attribute Specification to associate the ramstyle
synthesis attribute with a Signal or Variable Declaration
that represents an inferred RAM. Specify the synthesis attribute value asno_rw_check
, "logic"
, "M9K"
,
"M10K"
, "M20K"
, "M144K"
, or "MLAB"
, depending on the type of memory block that you
want the
Quartus® Prime software to use when implementing the inferred RAM. If you associate the synthesis
attribute with any other VHDL
object, or if you specify an illegal value, the
Quartus® Primesoftware ignores that synthesis attribute.
By setting the value to "M4K"
, "M9K"
, "M20K"
, "M144K"
, or "MLAB"
, you
can choose the type of memory block that the
Quartus® Prime software uses when implementing the inferred RAM. If the attribute is set to
"logic"
, then the RAM is implemented in logic cells.
In addition to specifying the type of memory block for the RAM
implementation, by setting the value to "no_rw_check"
,
you can use the ramstyle
attribute to indicate that you do not care about the output of the
inferred RAM when there are simultaneous reads and writes to the
same address. By default, the
Quartus® Prime software tries to create
an inferred RAM with the same read-during-write behavior as your
HDL source. In some cases, a RAM must be mapped into logic because
it has a read-during-write behavior that is not supported by the
memory blocks in your target device. In other cases, the
Quartus® Prime
software must insert extra logic to mimic your read-during-write
behavior, which can increase the resource requirements or reduce
the performance of your design. Setting the "no_rw_check"
value directs the
Quartus® Prime Compiler that the
read-during-write behavior of the HDL source does not need to be
preserved.
"no_rw_check"
in a single attribute by separating the values with a comma, for example
"no_rw_check, MLAB"
, or you can specify only a block-type or "no_rw_check"
.
For example, in the following code, the Attribute Declaration declares the ramstyle
synthesis attribute, and the Attribute Specification
specifies that the inferred RAM my_ram
is implemented using an M144K memory block Definition
-- First, declare a signal that represents a RAM
type memory_t is array (0 to 63) of std_logic_vector(0 to 7);
signal my_ram : memory_t;
attribute ramstyle : string;
attribute ramstyle of my_ram : signal is "M144K";