Files Tab (Qsys Component Editor)

You access this tab in the Qsys Component Editor by clicking the Files tab.

On the Files tab, you specify the files that are created when an instance of a component is generated. A component can generate files for synthesis with the Quartus® Prime Standard Edition software, and VHDL or Verilog files for simulation. Each list of files can also contain files that guide synthesis or simulation, such as timing constraint files.

Note: For more information about creating components in Qsys, refer to the Creating Qsys Components Help topic, and the Creating Qsys Componentschapter in volume 1 of the Quartus® Prime Standard Edition Handbook.